Chip power supply switching circuit powered by multiple power supplies

Abstract

The invention provides a chip power supply switching circuit powered by multiple power supplies. The chip power supply switching circuit comprises a low dropout linear regulator, a first comparator, a second comparator, an off-chip power supply selection circuit, an OR gate, a phase inverter and a power supply selection module, wherein one output of the low dropout linear regulator is connected with the input of the power supply selection module, and the other output of the low dropout linear regulator is connected with the positive input of the first comparator; the negative input of the first comparator and the input of the low dropout regulator are connected with a reference level, and the output is connected with one input of the OR gate; the output of the OR gate is connected with the other input of the power supply selection module; two inputs of the external power supply selection circuit are respectively connected with an external DC power supply and a battery power supply, and an output is connected with a positive input of the second comparator; the battery power supply is connected with the reverse input of the second comparator and the input of the power supply selection module; the output of the second comparator is connected with the input of the phase inverter and the input of the power supply selection module; and the output of the phase inverter is connected with the other input of the OR gate.

Description

technical field [0001] The invention relates to a power switching circuit, in particular to a chip power switching circuit powered by multiple power sources. Background technique [0002] There are normally two power supply paths for the main control system, VDC from the grid and VBAT from the battery. Normally, it is required to switch to battery power supply after the grid is powered off. Such as image 3 As shown, in deep sub-micron process nodes, many devices work at 3.3V, so it is necessary to convert 5V from the power grid to 3.3V inside the chip. Generally, this LDO is required to be bypassed when the battery is powered. . This will cause that when the power grid suddenly receives power, it will take a while for the LDO to start. At this time, the devices connected to the 3.3V power supply inside the chip will be directly connected to the 5V power supply, which may cause damage to the internal devices. [0003] For a system whose IO voltage supports 5V, a common sol...

AI Technical Summary

Problems solved by technology

This will cause the LDO to take a little time to start when the grid suddenly receives power. At this time, the device connected to the 3.3V power supply inside the chip will be directly connected to the 5V power supply, which may cause damage to the internal devices.

[0003] For a system whose IO voltage supports 5V, a common solution for power switching is as follows: Figure 4 As shown, the switching of the power supply is completed through the Diode outside the chip. When the grid is powered, the VDC voltage is higher than VBAT, and the diode D1 is turned on. When the grid is powered off, D0 is turned on to realize the switching of the power supply. 3.3V application for internal IO device

[0004] A sudden call to the power grid, the output of LDO5VT33 is too late to respond, follow the input, the output voltage of AVDD33 may exceed the withstand voltage of the device without corresponding protection

[0005] Another solution to this problem is to add a 5V to 3.3V LDO outside the chip, and then realize the direct switching between the 3.3V power supply and the VBAT power supply inside the chip, but it will increase the overall BOM cost

Images