Two-dimensional multi-channel convolution hardware accelerator based on FPGA

Abstract

The invention relates to a two-dimensional multi-channel convolution hardware accelerator based on an FPGA. The two-dimensional multi-channel convolution hardware accelerator comprises a control unit, a bias cache, a weight cache, an input feature cache, a convolution cache, a weight pre-reading register set, a PE array, a nonlinear unit, a second gating device and a third gating device. The feature cache is connected with the PE array; the weight cache is connected with the PE array through the weight pre-reading register group; the bias cache and the convolution cache are connected with the PE array through a third gate, and the output end of the PE array is connected with the convolution cache and the nonlinear unit through a second gate; inputting the feature cache, the bias cache and the weight cache to load data; the weight pre-reading register group performs pre-reading register on the weight cache; and the PE array writes input features, pre-reads the registered weight data, bias data or convolution intermediate results to carry out convolution operation, writes the convolution intermediate results into a convolution cache, activates the final convolution result through a nonlinear unit and outputs the final convolution result. According to the method, efficient calculation of any scale of convolutional layers in the CNN is realized.

Description

technical field [0001] The invention belongs to the technical field of deep learning acceleration circuits, and in particular relates to an FPGA-based two-dimensional multi-channel convolution hardware accelerator. Background technique [0002] At present, Convolutional Neural Network (CNN) has excellent performance in image classification, object detection, natural language processing, speech recognition, game gaming and other fields. However, due to its computing-intensive and storage-intensive characteristics, it encounters many difficulties when it is deployed to mobile devices or embedded devices. For example, in the new generation of aerospace models, there is a large demand for using CNN for information processing, but the heat dissipation conditions of aerospace equipment are harsh, and the real-time performance of calculations is very high. In the past, information processing methods based on general-purpose processors are increasingly difficult to meet the applica...

AI Technical Summary

Problems solved by technology

In the past, information processing methods based on general-purpose processors are increasingly difficult to meet the application requirements of aerospace models. For example, CPUs and DSPs cannot meet real-time requirements due to insufficient computing power, and GPUs cannot adapt to harsh heat dissipation environments due to high power consumption.

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