Parameter optimization method and system of analog integrated circuit

A technology of integrated circuits and optimization methods, applied in the fields of electrical digital data processing, computational models, character and pattern recognition, etc., can solve the loss of use value, increase the difficulty of Bayesian optimization algorithm high-dimensional problems, and Bayesian optimization algorithm iteration The number of times is limited to avoid excessive computing resource overhead, improve optimization efficiency, and increase the number of iterations.
CN114492279APending Publication Date: 2022-05-13XI AN JIAOTONG UNIV

Patent Information

Authority / Receiving Office
CN · China
Current Assignee / Owner
XI AN JIAOTONG UNIV
Publication Date
2022-05-13

Smart Images

  • Figure 1
    Figure 1
  • Figure 2
    Figure 2
  • Figure 3
    Figure 3
Patent Text Reader

Abstract

The invention discloses a parameter optimization method and system for an analog integrated circuit. The method comprises the following steps: acquiring a circuit structure, performance index requirements, design parameters and a value range thereof, and an iteration stop condition of the analog integrated circuit to be subjected to parameter optimization; based on the obtained design parameters and the value range thereof, sampling to obtain a training sample set; respectively inputting each sample in the training sample set into a circuit simulator for simulation to obtain a corresponding training response set; and performing iteration based on the training sample set and the training response set to realize parameter optimization of the analog integrated circuit. The invention provides a step-by-step optimization strategy based on mutual information analysis in order to alleviate the problem of curse of dimensionality and enable an algorithm to have the capability of processing a high-dimensional optimization problem. In each iteration, only part of design variables are selected for optimization, and the curse of dimensionality can be relieved.
Need to check novelty before this filing date? Find Prior Art

Description

technical field

[0001] The invention belongs to the technical field of analog integrated circuit design, relates to the field of Bayesian algorithm optimization, in particular to a parameter optimization method and system of an analog integrated circuit. Background technique

[0002] Analog integrated circuits usually occupy a small part of the chip area of ​​the mixed-signal system-on-chip. Due to the lack of mature automatic design solutions, the parameters of analog integrated circuits need to be manually selected and adjusted. The process is time-consuming and tedious and highly dependent on the designer's intuition and According to experience, the design of analog integrated circuits has become a key bottleneck in the time to market of a SoC. With the development of machine learning, parameter optimization methods for analog integrated circuits based on machine learning have received extensive attention in recent years.

[0003] The current optimization method of analo...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More