Multi-core neural network tensor processor with extensible computing power

Abstract

The invention discloses a multi-core neural network tensor processor with extensible computing power. The multi-core neural network tensor processor comprises a PCIE (Peripheral Component Interface Express) controller, M MTC (Machine Type Communication) cores and M SDRAM (Synchronous Dynamic Random Access Memory) controllers, each MTC core comprises S STC cores, and each STC core comprises L LTC cores; wherein the LTC cores are minimum calculation modules, and all the LTC cores in the same multi-core neural network tensor processor are configured to be same function modules; the PCIE controller is used for realizing access control of the multi-core neural network tensor processor and external equipment; and the SDRAM controller is used for the access of the corresponding MTC core to the off-chip SDRAM memory. According to the multi-core neural network tensor processor, a modular multiplexing design scheme is adopted, and the neural network tensor processor with a certain computing power specification is formed by repeatedly calling the minimum computing modules and combining the minimum computing modules together; the structure can greatly reduce the complexity of design and verification.

Description

technical field [0001] The invention relates to the field of neural network tensor processors, in particular to a multi-core neural network tensor processor with scalable computing power. Background technique [0002] Existing neural network tensor processors usually have a fixed internal structure and provide fixed computing performance (referred to as computing power). For example, the previous patent 1 (the invention name is: a neural network multi-core tensor processor, the application number is: 202011423696.0) and the previous patent 2 (the invention name is: a neural network tensor processor, the application number is: 202011421828.6), the computing power of tensor processors is determined by the number of computing resources, while in neural network tensor processors, computing resources need to match resources such as storage capacity and bus bandwidth. When the architecture of the tensor processor is determined, the maximum computing power that the architecture ca...

AI Technical Summary

Problems solved by technology

For a chip with an area of ​​several hundred square millimeters, its front-end design, verification, and back-end layout design will become very time-consuming and complicated, requiring a lot of manpower and material resources.

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