Unlock instant, AI-driven research and patent intelligence for your innovation.

Semiconductor structure and forming method of semiconductor structure

A technology of semiconductor and gate structure, applied in semiconductor devices, semiconductor/solid-state device manufacturing, transistors, etc., can solve the problems of increasing the complexity of processing and manufacturing ICs, and achieve the effect of good performance uniformity

Pending Publication Date: 2022-05-13
SEMICON MFG SOUTH CHINA CORP
View PDF0 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

This scaling down also increases the complexity of handling and manufacturing the IC

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Semiconductor structure and forming method of semiconductor structure
  • Semiconductor structure and forming method of semiconductor structure
  • Semiconductor structure and forming method of semiconductor structure

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0031] As mentioned in the background, there are still some problems in the existing "gate-last" process for forming metal gates. Now analyze and illustrate in conjunction with specific embodiment.

[0032] figure 1 It is a schematic cross-sectional structure diagram of a semiconductor structure in an embodiment.

[0033] Please refer to figure 1 , comprising: a substrate 100 comprising a first region I and a second region II; a first gate structure 101 located on the first region I; a second gate structure 102 located on the second region II ; The dielectric layer 103 located on the first region I and the second region II, the dielectric layer 103 is located on the sidewall of the first gate structure 101 and the sidewall of the second gate structure 102 .

[0034] In the semiconductor structure, the device density in the first region I is greater than the device density in the second region II, therefore, in the channel length direction, the width of the first gate struct...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

PropertyMeasurementUnit
widthaaaaaaaaaa
widthaaaaaaaaaa
Login to View More

Abstract

The invention discloses a semiconductor structure and a forming method of the semiconductor structure. The first gate structure and the second gate structure are located on the substrate, and the width of the first gate structure in the length direction of the channel is larger than that of the second gate structure in the length direction of the channel; a first barrier layer on the second gate structure; a second barrier layer on the first gate structure; the dielectric layers are located on the side wall of the first gate structure, the side wall of the second gate structure, the side wall of the first barrier layer and the side wall of the second barrier layer. The performance of the semiconductor structure is improved.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a semiconductor structure and a method for forming the semiconductor structure. Background technique [0002] The semiconductor integrated circuit (IC) industry has experienced exponential growth. In the course of IC evolution, functional density (ie, the number of interconnected devices per chip area) has generally increased, while geometry size (ie, the smallest component or line that can be produced using a fabrication process) has decreased. This scaling down process generally provides benefits by increasing production efficiency and reducing associated costs. This scaling down also increases the complexity of handling and manufacturing the ICs. [0003] In some IC designs, as technology nodes shrink, an advantage is realized by replacing the typical polysilicon gate with a metal gate to improve device performance as the feature size shrinks. One process for form...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/088H01L21/8234
CPCH01L27/0886H01L21/823431H01L21/823456H01L21/823462
Inventor 杨振辉刘中元徐广州李钊
Owner SEMICON MFG SOUTH CHINA CORP