TLB management method and device, equipment and storage medium

Abstract

The invention discloses a TLB management method and device, equipment and a storage medium, and the method comprises the steps: when a virtual address is received, comparing an identification field of the virtual address with identification fields of TLB table entries, the identification fields of the TLB table entries comprising a starting identification field and a granularity field, and when one TLB table entry comprises the virtual address, determining that the virtual address exists in the TLB table entry; obtaining a physical address according to the TLB table item, and returning the physical address to the processor; and when the TLB is not hit, after the physical address is returned, merging continuous page table entries in the processor cache to generate a first TLB table entry, if a second TLB table entry continuous with the first TLB table entry exists in the TLB, merging the two table entries into a third TLB table entry, and if the second TLB table entry does not exist, inserting the first TLB table entry into the TLB. According to the method and the device, the management of the multi-granularity page supported by the TLB is realized, and in addition, the coverage range of the TLB is effectively expanded by merging the page table entries and merging the TLB table entries.

Description

technical field [0001] The present invention relates to the field of computer technology, and in particular, to a TLB management method, apparatus, device and storage medium. Background technique [0002] In order to meet the growing demand for memory of applications in the current era of big data, DRAM (Dynamic Random Access Memory) and NVM (Non-volatile Memory) are combined into a hybrid memory to To achieve the purpose of expanding available memory. Due to the shortcomings of NVM, such as high write latency and limited number of writes, it is usually necessary to store hot pages on DRAM and cold pages on NVM, thereby improving the overall performance of the system. [0003] In order to solve the problem that the processor needs to frequently access the memory when obtaining the physical address, which leads to the degradation of system performance, usually when the processor needs to obtain the physical address, the virtual address and the physical address are converted ...

AI Technical Summary

Problems solved by technology

While the hybrid memory expands the available memory, it also intensifies the processing pressure of the TLB (Translation Lookaside Buffer, bypass translation buffer) in the process of virtual address and physical address translation. Due to the limited number of TLB entries stored in the TLB, the TLB The coverage of TLB is limited. When the available memory expands, the probability of missing TLB will be aggravated, which will increase the number of times the processor accesses memory, resulting in a decrease in system performance.

The current common method is to use huge page technology in memory to expand the coverage of TLB. However, when using large page technology in hybrid memory, there is a conflict between the management granularity of huge page technology and the granularity of page migration in hybrid memory. Therefore, page migration between DRAM and NVM is invalid and page fragmentation occurs. When the application has pages of different granularities, the effect of managing pages of different granularities through TLB is poor.

[0004] In order to solve the problems of large page technology, the existing technology usually provides a dedicated TLB for each granularity page, so that the TLB supports the management of multi-granularity pages, but the existing technology is only applicable to applications with less granularity pages , when the application has many page granularities, it is difficult to maintain a dedicated TLB for each page granularity in the limited TLB space, and the space utilization of the TLB is low

Images