Automatic script compiling and using method for solving physical design long-line time sequence delay

Abstract

The invention discloses an automatic script compiling and using method for solving physical design long-line time sequence delay, which is characterized by comprising the following steps of: setting a logic connection script; setting a main script; in the floorplan stage, finding out a time sequence violation path to be optimized; setting parameters of a starting point, an end point and an inflection point according to the information of the to-be-optimized time sequence violation path; on the basis of the logic connection script and the main script, according to different design processes, setting of standard unit parameters of a buffer BUF and a phase inverter INV is replaced, setting of transverse and longitudinal distances of the inserted buffer BUF and the phase inverter INV is replaced, and needed parameters are selected; before layout and wiring, optimization is completed in a layout and wiring PR tool. The method is applied to a chip digital physical design layout wiring stage, so that the influence caused by larger and larger line delay in an advanced process is solved, and the line delay is the lowest for a long path on a physical level.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to an automatic script writing and using method for solving the long-line timing delay of physical design. Background technique [0002] With the progress of semiconductor technology to 40nm, 28nm and lower, the timing of physical level in chip design has become a design difficulty. Practice has found that after the physical design is routed, the impact of the line delay is far greater than the impact of the standard cells contained in the logic design itself. Although automatic place and route tools can achieve optimization, for special requirements or timing-constrained paths, physical design engineers need to manually optimize one by one. If the number of paths is large, it will cause a lot of work and prolong the design cycle. SUMMARY OF THE INVENTION [0003] In order to solve the above technical problems, the present invention provides an automatic script writing an...

AI Technical Summary

Problems solved by technology

Although automatic layout and routing tools can achieve optimization, for special requirements or tight timing paths, physical design engineers need to manually optimize one by one

If the number of paths is large, it will cause a large workload and prolong the design cycle

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