Detection structure and forming method and detection method thereof

Abstract

The invention discloses a detection structure and a forming method and a detection method thereof, and the structure comprises a substrate which comprises a test region, and the test region comprises a plurality of first active regions; the first gate structure and the second gate structure are positioned on the plurality of first active regions; the first source-drain doping layer, the second source-drain doping layer and the third source-drain doping layer are located in the first active region; the first conductive structure is positioned on the first source-drain doped layer; and the third conductive structure is positioned on the third source-drain doped layer. A first voltage is applied to a first conductive structure and a first gate structure; and applying a second voltage on the third conductive structure and the substrate, wherein the second voltage is smaller than the first voltage. When the first gate structure and the second gate structure are short-circuited, a first voltage applied to the first gate structure is also equivalently applied to the second gate structure, the first source-drain doping layer and the third source-drain doping layer are communicated, and at the moment, a current is detected on the third conductive structure; and the short circuit problem of the first gate structure and the second gate structure is judged.

Description

technical field [0001] The present invention relates to the technical field of semiconductor manufacturing, and in particular, to a detection structure, a method for forming the same, and a detection method. Background technique [0002] Metal-oxide-semiconductor (MOS) transistors are the most basic devices in semiconductor manufacturing. They are widely used in various integrated circuits. They are classified into NMOS and PMOS transistors according to the main carriers and doping types during manufacture. [0003] The prior art provides a method for fabricating a MOS transistor. The method includes: providing a semiconductor substrate, forming a shallow trench isolation structure on the semiconductor substrate, the semiconductor substrate between the shallow trench isolation structures being an active region, and forming a well region in the active region; The first ion implantation is to dope impurity ions on the surface of the well region to adjust the threshold voltage...

AI Technical Summary

Problems solved by technology

[0004] However, the performance of transistors formed by existing technologies still needs to be improved

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