High-order multiphase digital filtering sampling method and system

Abstract

The invention provides a high-order multi-phase digital filtering sampling method and system aiming at the problem that hardware cannot be realized due to the fact that the filtering rate of a broadband communication system is too high and the order of a filter is too high. The method comprises the following steps: firstly, carrying out interpolation operation on a digital signal, then carrying out multiphase decomposition on a coefficient of a filter by utilizing symmetry of the filter, then designing a split lookup table by adopting a parallel distribution algorithm, and finally, optimizing the number of stored lookup tables by utilizing symmetry of content of the lookup table. According to the implementation scheme, the storage scale of the lookup table is greatly reduced, resource consumption is reduced, the operation rate and the operation amount are effectively reduced, the working frequency of the filter is greatly improved, and the method is suitable for engineering implementation.

Description

technical field [0001] The invention relates to the technical field of digital signal processing, in particular to a high-order polyphase digital filter sampling method and system. Background technique [0002] With the development of communication systems, the requirements for broadband, high-speed, and real-time signal processing speed are getting higher and higher. In order to realize the full software processing after RF direct sampling, the efficiency of the signal processing algorithm after sampling is the key technology for realization. The structure, speed, real-time, resource consumption and performance of the processing also put forward higher requirements. [0003] The polyphase filter decomposes the transfer function H(z) of the FIR digital filter into multiple groups of different phases, and the different phase groups correspond to the extracted data after time delay, and accumulate the output results of each filter, so that it can effectively Reducing the samp...

AI Technical Summary

Problems solved by technology

Common FIR digital filtering implementations are generally implemented in the form of multiply-accumulate (MAC). This implementation of filtering usually takes up more DSP resources. As the tap coefficient of the FIR digital filter increases, the resource consumption of the FPGA's DSP also increased

In high-speed communication systems, the digital filter will also face the problem that the rate is too high and the hardware cannot realize it.

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