Low-energy-consumption high-precision approximate parallel fixed-width multiplication and accumulation device

Abstract

The invention discloses a low-energy-consumption high-precision approximate parallel fixed-width multiplication and accumulation device which comprises an input truncation compensation circuit, a base-8 Booth encoder and decoder circuit, a first-stage partial product compression circuit, a second-stage partial product compression circuit and a carry lookahead adder circuit. Wherein in the first-stage partial product compression circuit, a Wallace tree with the weight is cut off at a low position, an approximate 42 compressor is used at a second low position, and an accurate compressor is used at a high position; the second-stage partial product compression circuit uses a precise compressor and comprises a probability constant compensation part which is used for compensating for first-stage partial product truncation, compensating for errors generated by using an approximate 42 compressor and compensating for second-stage partial product truncation. According to the method, power consumption is reduced by using truncation and approximation methods, hardware overhead is reduced, a probability constant compensation strategy is adopted for errors, and high precision is maintained.

Description

technical field [0001] The invention relates to the technical field of approximate arithmetic operation circuit design, in particular to a low-energy-consumption high-precision approximate parallel fixed-width multiplication and accumulation device. Background technique [0002] Since 2007, a series of semiconductor laws such as Moore's Law and Dennard's scaling law have gradually become invalid, and it has become very difficult to continuously improve the performance of chips while maintaining the same energy consumption. And nowadays, the importance of big data processing and artificial intelligence continues to increase. These applications require massive data and complex calculations, which put forward higher requirements for energy-efficient and high-performance general-purpose computing engines and application-specific integrated circuits. Many existing applications such as pattern recognition, video processing, and data mining have their own fault-tolerant capabilitie...

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Problems solved by technology

The paper "A High-Performance and Energy-Efficient FIRAdaptive Filter Using Approximate Distributed Arithmetic Circuits" published in IEEE TRANSACTIONS ONCIRCUITS AND SYSTEMS discloses an adaptive filter design method based on a distributed algorithm, in which the error calculation module and parallel multiplication accumulation The design idea of ​​the unit is consistent, but the approximation method is relatively rough, failing to achieve an effective balance between precision and hardware overhead

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