Automatic control method and system for low-power-consumption mode of chip

Abstract

The invention provides an automatic control method and system for a low-power-consumption mode of a chip, and relates to the technical field of low-power-consumption design, and the method comprises the steps: configuring a turn-off time sequence and a wake-up time sequence of each power supply partition associated with at least one low-power-consumption mode of a power supply in a power supply control module, the turn-off time sequence comprising an entry state and an entry condition, and the wake-up time sequence comprising a wake-up state; the awakening time sequence comprises an awakening state and an awakening condition; the power supply control module monitors the current state data of the power supply and controls the power supply to turn off the power supply of each associated power supply subarea in sequence according to a turn-off time sequence when the current state data accords with an entry state and a corresponding entry condition so as to enter a corresponding low-power-consumption mode; and when the current state data accords with the wake-up state and the corresponding wake-up condition, controlling the power supply to sequentially switch on the power supply of the associated power supply partitions according to the wake-up time sequence so as to exit the low-power-consumption mode. The method has the beneficial effects that the state machine is adopted for state switching control, a combined loop does not need to be adopted to accumulate a deliberate time sequence, and the traceability and the expansibility are high.

Description

technical field [0001] The present invention relates to the technical field of low power consumption design, in particular to a low power consumption mode automatic control method and system of a chip. Background technique [0002] The implementation of the control loop is very important during chip power-up and low-power modes, since part of the power and clocks are turned off. At present, traditional power control generally designs control logic through a combined loop with delay. In traditional power control, firstly, there are several power-on and power-off modes. Different modes have different power-on and power-off procedures, and control circuits for different modes must be done separately. The delay loops and control loops used in each control circuit are different, and the resulting delay loops are huge in size, complex in control, and difficult to trace. In addition, due to the different delays used in different modes, the clock control is also different. If you ...

AI Technical Summary

Problems solved by technology

The delay loop and control loop used in each control circuit are different, so the delay loop has a huge area, complex control and difficult to trace

In addition, due to the different delays and clock controls used in different modes, the phenomenon of not being able to exit the low-power mode after entering the low-power mode will occur accidentally, which is a great test for the designer's experience.

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