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Semiconductor structure and manufacturing method thereof

A manufacturing method and semiconductor technology, applied in the direction of semiconductor devices, electrical solid devices, electrical components, etc., can solve the problems of insufficient layout space, too close between components, and different pattern densities

Pending Publication Date: 2022-06-24
FUJIAN JINHUA INTEGRATED CIRCUIT CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, with the continuous shrinking of memory devices, there are many problems to be overcome in its manufacturing process, such as the micro-load effect caused by different pattern densities, or the problem of insufficient layout space caused by too close components

Method used

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  • Semiconductor structure and manufacturing method thereof
  • Semiconductor structure and manufacturing method thereof
  • Semiconductor structure and manufacturing method thereof

Examples

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Embodiment Construction

[0055] In the illustrations in this manual, Figure 1A , Figure 2A as well as Figure 3A A plan view showing the fabrication process of a semiconductor structure according to the preferred embodiment of the present application, Figure 1B , Figure 2B as well as Figure 3B respectively along the Figure 1A , Figure 2A as well as Figure 3A The cross-sectional view made by the middle section line AA', which depicts the relative positions of the components of the semiconductor structure of the present invention in the direction perpendicular to the substrate and their connection relationships.

[0056] First, please also refer to Figure 1A and Figure 1B. The semiconductor structure of the present invention is fabricated on a semiconductor substrate 100, such as a silicon substrate, a germanium substrate and / or a silicon germanium substrate. A memory cell region 100a is defined on the semiconductor substrate 100, which is used for arranging memory cells (cells) of the ...

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PUM

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Abstract

The invention discloses a semiconductor structure and a manufacturing method thereof, and the semiconductor structure comprises a substrate which is provided with a plurality of grooves and active regions, and a plurality of bit lines which are arranged on a storage unit region at equal intervals along a first direction and extend towards a second direction orthogonal to the first direction, the bit lines are electrically connected to an active region in the substrate through a groove, the dummy bit line is located on the outermost side of the bit lines in the first direction and extends towards the second direction, the width of the dummy bit line in the first direction is larger than that of the bit lines in the first direction, and the width of the dummy bit line in the second direction is larger than that of the bit lines in the second direction. The bottoms of the dummy bit lines are not in the same horizontal plane, and the dummy bit lines and the bit lines have the same composition and layer structure.

Description

technical field [0001] Embodiments disclosed in the present invention relate to a semiconductor structure and a fabrication method thereof, and more particularly, to a semiconductor structure having bit lines of different widths and a fabrication method thereof. Background technique [0002] A memory device is an integrated circuit typically used in computer systems to store data, fabricated as one or more arrays of individual memory cells. Memory devices can use bit lines (also known as digit lines, data lines, or read lines) and word lines (also known as access lines) for write and read operations, where the bit lines can be along a matrix The columns of the matrix are electrically connected to the memory cells, and the word lines may be electrically connected to the memory cells along the columns of the matrix. Each memory cell is individually addressable via a combination of a bit line and a word line. [0003] Memory devices may be volatile, semi-volatile or non-volat...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/1157H01L27/11573H01L27/11575H01L27/11578H10B43/35H10B43/20H10B43/40H10B43/50
CPCH10B43/35H10B43/50H10B43/20H10B43/40
Inventor 童宇诚张钦福
Owner FUJIAN JINHUA INTEGRATED CIRCUIT CO LTD
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