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SLT test method and system of SIP chip

A testing method and testing system technology, applied in electronic circuit testing, measuring devices, measuring electrical variables, etc., can solve the problems of error-prone and complicated operation process, and achieve the effect of convenient tracking and positioning, improving testing flexibility and testing efficiency.

Active Publication Date: 2022-07-29
苏州吾爱易达物联网有限公司
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  • Claims
  • Application Information

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Problems solved by technology

[0005] In view of this, the present invention provides a kind of SLT test method and system of SIP chip, helps to improve the test efficiency of SLT test scheme when realizing the radio frequency calibration comprehensive test function; Recording and testing) lead to complicated and error-prone operations

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  • SLT test method and system of SIP chip
  • SLT test method and system of SIP chip
  • SLT test method and system of SIP chip

Examples

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Embodiment Construction

[0050] Example embodiments will now be described more fully with reference to the accompanying drawings. However, example embodiments can be embodied in various forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of example embodiments to those skilled in the art. The described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. In the following description, numerous specific details are provided in order to give a thorough understanding of the embodiments of the present disclosure. However, one skilled in the art will appreciate that the technical solutions of the present disclosure may be practiced without one or more of the specific details, or other methods, materials, devices, etc. may be employed. In other instances, well-known solutions have not been shown o...

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Abstract

The invention provides an SLT test method and system of an SIP chip, the method is operated in an SLT test system, the SLT test system comprises a first test work station and a second test work station, the second test work station comprises a radio frequency comprehensive tester, a second test machine PC, a second sorting machine and a second test base plate, the radio frequency comprehensive tester is connected with the second test machine PC, and the second sorting machine PC is connected with the second test base plate. The method comprises the following steps: the first test station carries out firmware burning and code writing on the chip to be tested; the radio frequency calibration test software controls the radio frequency comprehensive tester to carry out radio frequency calibration test on the to-be-tested chip to obtain a first test result, and sends the first test result to the second sorting machine through the second test machine PC; the second sorting machine sorts the to-be-tested chip based on the first test result; the invention provides a set of SLT testing scheme which supports SIP chip radio frequency calibration testing and is separated from firmware burning and testing, and the testing flexibility and the testing efficiency of calibration comprehensive testing are improved.

Description

technical field [0001] The invention relates to the technical field of chip testing, in particular to a SLT testing method and system of a SIP chip. Background technique [0002] SIP (System In a Package, system-in-package) package is a package solution that integrates multiple functional wafers, including processors, memory and other functional wafers into one package, thereby realizing a basic complete function. Corresponds to SOC (System On a Chip). SIP packaging is a packaging method in which different chips are side-by-side or stacked, while SOC is a high degree of integration of the components required by the system into a single chip. [0003] The SIP-level chip can effectively combine the devices required for each function to achieve a higher level of integration, thereby realizing a basically complete functional device. At the same time, relying on efficient production process and testing capabilities, it can greatly reduce product development time and save costs ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G01R31/28G01R35/00
CPCG01R31/2896G01R35/005Y02D30/70
Inventor 刁志峰刘高云
Owner 苏州吾爱易达物联网有限公司
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