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Packaged electronic system formed from electrically connected and electrically isolated dies

An electrical connection structure, bare chip technology, applied in the direction of circuits, electrical components, electrical solid devices, etc., can solve the problems of reducing communication bandwidth, applicable systems, and repeatability.

Pending Publication Date: 2022-07-29
STMICROELECTRONICS SRL
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, even these approaches are not completely satisfactory and / or applicable to all systems
In fact, the provision of shielding coating cannot be used for small-sized wires, and there are repeatability problems, so it is far from effective
Also, the use of high capacitors is not always possible as they lead to increased system power consumption and reduce the bandwidth available for communication

Method used

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  • Packaged electronic system formed from electrically connected and electrically isolated dies
  • Packaged electronic system formed from electrically connected and electrically isolated dies
  • Packaged electronic system formed from electrically connected and electrically isolated dies

Examples

Experimental program
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Embodiment Construction

[0032] In the following description, reference will be made to a system formed from two dice, each integrating an ASIC (application specific integrated circuit), but the invention is applicable to any type of electronic device, be it a single component or a more complex circuit, Operates at different voltages and even has very different voltage values ​​in normal mode.

[0033] Figure 5A A system 50 is shown comprising two dice 51 , 52 each integrating its own device 53 , 54 . As mentioned above, the devices 53, 54 are both ASICs here. like Figure 5A As shown, the two dies are spaced a distance D1 from each other. The distance D1 extends between the respective sidewalls of the first die 51 and the second die 52 .

[0034] Both the dies 51 , 52 are secured on the support 55 . The support 55 has, for example, a parallelepiped shape with a first main face 55A and a second main face 55B (see also Figure 5B details). The first and second major surfaces 55A, 55B may be ref...

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Abstract

Embodiments of the present disclosure relate to packaged electronic systems formed from electrically connected and electrically isolated dies. A packaged electronic system has a support formed from an insulating organic substrate that accommodates a floating buried conductive region. The first die is secured to the support and carries a first die contact region on the first major surface that is capacitively coupled to a first portion of the buried conductive region. A second die is secured on the support and carries a second die contact region on the first major surface that is capacitively coupled to a second portion of the buried conductive region. A package mass surrounds the first die, the second die, the first die contact region, the second die contact region, and at least a portion of the support.

Description

technical field [0001] The present invention relates to a packaged electronic system formed from electrically connected and electrically isolated dice. Background technique [0002] Electronic system in which dies are packaged in a package and integrated electronic devices (components and / or circuits) are configured to operate at very different voltages and exchange signals with each other. For example, the electronic system may be a power supply system, a digital isolator, a power transistor drive system, a DC-DC converter or other system in which at least one device operates at high voltage (even above 10 kV) and / or high power. For these systems, it is known to include measures to maintain a proper isolation current between the various devices. [0003] In particular, packages designed to provide high isolation levels are mainly based on two approaches: [0004] A two-dice approach, in which two dice each integrate a corresponding "functional" device and a corresponding ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/64H01L23/498H01L25/065H01L23/31
CPCH01L23/642H01L23/49838H01L25/0655H01L23/3107H01L23/5383H01L23/49816H01L23/48H01L2224/16227H01L23/49558H01L2924/19107H01L2224/0401H01L2224/16265H01L2924/19104H01L2924/19041H01L2224/16235H01L2924/15311H01L2224/73253H01L2224/32245H01L24/16H01L23/49575H01L23/49531H01L23/4951H01L23/5384H01L23/5386H01L24/14H01L25/0652
Inventor D·帕西S·阿多尔诺M·德尔萨尔托F·塞利尼A·格里蒂
Owner STMICROELECTRONICS SRL