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Graph testing method and device

A graphic detection and graphic technology, applied in measuring devices, graphic reading, optical devices, etc., can solve problems such as price increases, differences, and complex configurations

Inactive Publication Date: 2004-08-04
HITACHI LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] In the original first method, since the pattern to be compared is a different chip, two types of errors are mixed, so even if it is a normal part, there will be a difference, so it is difficult to identify a subtle defect
The first type of error is caused by the object. Because the exposure device does not expose the entire wafer at the same time, the exposure conditions of different chips are different, or although the entire wafer can be processed at the same time with a CVD device, but when the comparison distance becomes For a long time, especially the thickness of the film around the wafer will be different, so that the graphics will also be different
The second error comes from the detection device. Since it is difficult to detect a large area at the same time, although the time difference can be set for graphic detection comparison, it is easily affected by device drift and vibration when the time interval is relatively long. In order to ensure its reliability, Will complicate the composition of the device and increase the price
[0005] In the original second or third method, the figure of the object to be compared does not necessarily exist, that is, the detection area needs to be limited to the inside of the memory board that is correctly configured according to the rules of the memory element and conforms to the comparison direction Therefore, strict area designation is required, especially for the area that is further subdivided inside the memory board and divided by the existing setting method. The detection area must also be set. , it can be expected that the area setting will take a lot of time and limit the area that can be detected

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Embodiment Construction

[0018] Preferred embodiments of the present invention will be described below with reference to the accompanying drawings.

[0019] FIG. 1 is a schematic simulation diagram of a pattern wiring arrangement of a semiconductor wafer in the manufacturing process of a semiconductor memory, which is an implementation form of the object to be inspected according to the present invention. On the wafer 1, a plurality of chips 2 which are final identical products are arranged. Such as figure 2 As shown, in the pattern wiring configuration inside the chip 2, an indirect peripheral circuit 6 with a very rough pattern is formed, and its storage elements are arranged in a two-dimensionally repeated chip along the X direction Px and the Y direction Py. And a direct peripheral circuit 4, 5 consisting of sensor amplifiers, I / O circuits, decoder circuits, etc. located at the periphery of the memory board with a pattern density comparable to the memory board. The memory board 3 is further divi...

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Abstract

Graph testing method and device is disclosed. The present invention relates to detection of defects with simple specification of the coordinates, in the inspection of an object having a plurality of patterns in which a portion having the two-dimensional repetition and portions having the repetition only in the X direction and in the Y direction are mixedly present. The cross comparison between a notice point (101) and comparison points 102a-102d to for example which are repetitive pitches away from the notice point is carried out, and only the portion having the difference which can be found out with any of the comparison points is extracted as a defect candidate, which results in that the portion having the two-dimensional repetition as well as the portion having the repetition only in the X direction or in the Y direction can be inspected.

Description

technical field [0001] The present invention relates to pattern detection by obtaining images or waveforms representing physical properties of objects such as semiconductor wafers, etc. A method and device thereof, and a method for manufacturing a semiconductor wafer using the detection method and device. Background technique [0002] The original pattern detection method, such as the first method disclosed in Japanese Patent Application Laid-Open No. 6-294750, uses the property that adjacent chips should have the same pattern to compare adjacent chips, and if a difference is found, it is determined that the two chips are One of the methods with defects in the graphics, such as the second method disclosed in Japanese Patent Application Laid-Open No. 57-196530, uses the property that the storage elements in the chip should have the same graphics to compare the graphics of adjacent units, if Finding a discrepancy is a method of determining that the pattern of one of the two c...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G01B11/24G01N21/956G06T1/00G06T7/00H01L21/66
CPCG06T7/001G06T2207/10056G06T2207/30148H01L22/00
Inventor 广井高志田中麻纪渡辺正浩久迩朝宏品田博之野副真理杉本有俊宍户千绘
Owner HITACHI LTD