Operation method of fast erasable and rewritable memory with symmetrical double-channel

Abstract

There is a manipulating method for flash memory with a symmetrical dual channel, it at least includes: at first, it writes procedure into quick erasable memory, makes the charge locate at both side sof ONO layer in the second wire in order to form the symmetrical dual channel structure, and accomplishes writing operation of one bit, then it transmits the selective voltage to the first and the third bit with in order to select the second bit wire for symmetrical structure. Following the second bit wire should be grounded. Then the reading voltage is transmitted to the second letter wire, at the same time it collects reading current, and the current is the total of current which pass through the symmetrical dual channel, so the speed of reading of flash memory is advanced.

Description

technical field [0001] The present invention relates to an operating method of a flash memory, in particular to an operating method of a symmetrical dual-channel flash memory. Background technique [0002] With the advancement of the electronic industry and the rapid development of computer technology, more and more electronic products are widely used in daily life, which improves the convenience of work and the quality of life. Usually, many electronic products use a variety of different memories to provide a temporary storage space for the storage and exchange of data required for various operations, especially the non-volatile characteristics of the flash memory. On the one hand, it can accept repeated data Read and write operations, without the need for continuous power supply or periodic state updates, can maintain the storage state of data. On the other hand, due to the improvement of flash memory structure design and the improvement of semiconductor manufacturing tech...

AI Technical Summary

Problems solved by technology

The traditional reading method is to read the data storage state in batches, and the reading current only comes from the channel 116 of the single path 114, so the reading current is relatively low. If you want to increase the reading current of each channel , it is bound to greatly increase the read voltage applied to the first bit line 106a and the second bit line 106b. Relatively, a higher read voltage will cause the stored charge (112a, 112b) to lose

[0007] Therefore, the reading current generated by the traditional flash memory reading method is too small, causing the reading speed to be too slow, or at the same reading speed, the applied reading voltage is too high, making the flash memory The number of reads of the memory is reduced, so that the service life of the memory is reduced

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