Low power consumption analogue signal sample retaining circuit and its application method

A sample-and-hold circuit and analog signal technology, which is applied to electrical components, electronic switches, biological neural network models, etc., can solve the problem of large circuit power consumption and achieve the effect of reducing power consumption

Inactive Publication Date: 2003-07-09
BEIJING LHWT MICROELECTRONICS
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

At present, the common analog signal sampling and holding circuit is composed of at least three stages of amplification circuit, sampling and holding circuit, including an input signal, an output signal and a control signal, and there are only two states of sampling and holding. In the analog signal sampling and holding circuit The MOS tube is always in a saturated state under any circumstances, so the power consumption of the circuit is relatively large

Method used

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  • Low power consumption analogue signal sample retaining circuit and its application method
  • Low power consumption analogue signal sample retaining circuit and its application method
  • Low power consumption analogue signal sample retaining circuit and its application method

Examples

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Embodiment Construction

[0019] figure 1 Among them, it is an ordinary three-stage amplified analog signal sampling and holding circuit, Cin is the input terminal capacitance, M1 and M2 form the first-stage amplifying circuit, M3 and M4 form the second-stage amplifying circuit, and M5 and M6 form the third-stage amplifying circuit circuit, Cf is the feedback capacitor.

[0020] figure 2 Among them, a low-power analog signal sample-and-hold circuit includes a three-stage amplifier circuit, a sample-and-hold circuit, and three control switches Xsw3, Xsw4, and Xsw5 are added. Xsw4 is connected between the source of the PMOS transistor connected to the power supply and the power supply in each stage of the amplifier circuit before the final stage amplifier circuit, to control the connection and disconnection of the PMOS transistor and the power supply, and Xsw3 is connected to the final stage amplifier circuit. Between the source and the ground of the NMOS transistor connected to the ground in each sta...

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Abstract

The present invention relates to an analog signal sampling / holding circuit with low power consumption and its application method. Said invention includes at least three-stage amplification circuit, sampling and holding circuit, and it is characterized by that three control switches are added, and a control signal is newly added, and can be used for respectively controlling the described control switches, and the last one-stage amplification circuit input end can be used for controlling control signal inversion of switch and other control switches. When the neural operation amplification sampling / holding circuit is in the rest state, the power consumption of the circuit only is formed from electric leakage of tube, so that it possesses the advantages of low power consumption, and when the circuit is in the restoration state, its sampling signal can be normally outputted.

Description

technical field [0001] The invention belongs to the field of analog signal sampling and holding circuits, in particular to a low power consumption analog signal sampling and holding circuit and an application method thereof. Background technique [0002] The analog signal sampling and holding circuit samples the input signal in a short period of time, enters the holding mode to stabilize the sampled signal in the remaining cycle time, and outputs the held signal when needed. At present, the common analog signal sampling and holding circuit is composed of at least three stages of amplification circuit, sampling and holding circuit, including an input signal, an output signal and a control signal, and there are only two states of sampling and holding. In the analog signal sampling and holding circuit The MOS tube is always in a saturated state under any circumstances, so the power consumption of the circuit is relatively large. [0003] After the input signal is processed by ...

Claims

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Application Information

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IPC IPC(8): G06N3/063H03K17/00
Inventor 吴南健旷章曲陈杰寿国梁杨军
Owner BEIJING LHWT MICROELECTRONICS
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