Low power consumption analogue signal sample retaining circuit and its application method
Patent Information
- Authority / Receiving Office
- CN · China
- Current Assignee / Owner
- BEIJING LHWT MICROELECTRONICS
- Publication Date
- 2003-07-09
- Estimated Expiration
- Not applicable · inactive patent
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Abstract
Description
technical field
[0001] The invention belongs to the field of analog signal sampling and holding circuits, in particular to a low power consumption analog signal sampling and holding circuit and an application method thereof. Background technique
[0002] The analog signal sampling and holding circuit samples the input signal in a short period of time, enters the holding mode to stabilize the sampled signal in the remaining cycle time, and outputs the held signal when needed. At present, the common analog signal sampling and holding circuit is composed of at least three stages of amplification circuit, sampling and holding circuit, including an input signal, an output signal and a control signal, and there are only two states of sampling and holding. In the analog signal sampling and holding circuit The MOS tube is always in a saturated state under any circumstances, so the power consumption of the circuit is relatively large.
[0003] After the input signal is processed by ...