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Method for forming semiconductor element fine figure

A micro-graphics and semiconductor technology, applied in semiconductor devices, semiconductor/solid-state device manufacturing, electrical components, etc., can solve problems such as difficulty in obtaining graphic sizes

Inactive Publication Date: 2003-08-27
DONGBUANAM SEMICON
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] Although investments and efforts are usually made to form more ultra-fine patterns by shrinking semiconductor elements, it is difficult to obtain the correct pattern size (size)

Method used

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  • Method for forming semiconductor element fine figure
  • Method for forming semiconductor element fine figure
  • Method for forming semiconductor element fine figure

Examples

Experimental program
Comparison scheme
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Embodiment Construction

[0015] Hereinafter, embodiments of the present invention will be described with reference to the drawings.

[0016] Figure 2a-2e It is a cross-sectional view illustrating a method of forming a fine pattern of a semiconductor element according to an embodiment of the present invention.

[0017] Such as Figure 2a As shown, in order to finally obtain the figure 1 The same pitch as the shown pattern, first, after sequentially forming the first insulating film 1 and the second insulating film (not shown) on the semiconductor substrate (not shown), after the second insulating film A photosensitive film pattern 3 of a predetermined shape is formed on the film. At this point, the photosensitive film pattern 3 is pressed figure 1 Patterned at twice the pitch (α+β) shown. Then, the second insulating film pattern 2 is formed by dry etching the second insulating film. At this time, it is the thickness of the second insulating film that is much thicker than the thickness of the thi...

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PUM

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Abstract

Disclosed is a micro-pattern forming method for a semiconductor device having a pitch size of alpha+beta, comprising the following steps; sequentially forming first and second insulation films on a semiconductor substrate; forming a photosensitive film in a proper configuration on the second insulation film, the photosensitive film having a second pitch size which is twice the first pitch size of alpha+beta; dry etching the second insulation film using the photosensitive film as a mask; removing the photosensitive film; forming a third insulation film on an entire surface of the substrate including remaining portions of the second insulation film; forming a fourth insulation film on a resultant structure in portions corresponding to those between the remaining portions of the second insulation film; etching the third and fourth insulation films using a proper formal solution, whereby the third insulation film has a dry etching selectivity of 1 to 1 in respect to the fourth insulation film, to first flatten the fourth insulation film until the second insulation film is exposed; etching the third insulation film using the fourth and second insulation films as masks to form a third insulation film pattern; and filling a conductive film into spaces between the second and third insulation films and second flattening the conductive film to form conductive lines having a pitch size of alpha+beta.

Description

technical field [0001] The present invention relates to a method for forming a micro pattern of a semiconductor element, and more particularly to a method for forming a micro pattern of a semiconductor element corresponding to a highly integrated micro pattern. Background technique [0002] figure 1 It is a cross-sectional view illustrating a conventional method of forming a fine pattern of a semiconductor element. [0003] First, the conductor film 20 and the photosensitive film 30 are sequentially formed on the first insulating film 10 . Then, after the photosensitive film 30 is patterned so that the pitch is α+β′, the conductive film 20 is partially dry-etched using the photosensitive film 30 as a mask, and then the photosensitive film 30 is removed to form Form graphics. [0004] Although investments and efforts are generally made to form more ultrafine patterns by shrinking semiconductor elements, it is actually difficult to obtain a correct pattern size. [0005] F...

Claims

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Application Information

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IPC IPC(8): H01L21/3205G03F7/00H01L21/027
CPCH01L2924/0002H01L2924/00H01L21/027
Inventor 朴哲秀
Owner DONGBUANAM SEMICON