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Method for maknkig shallow trench isolation zone

A manufacturing method and technology of shallow ditches, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve problems such as inability to master the manufacturing process and inability to achieve machine self-testing, so as to achieve improved detection capabilities and low cost , the effect of simple method

Inactive Publication Date: 2004-07-28
MACRONIX INT CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0007] Another object of the present invention is to provide a defect monitoring method in the shallow trench isolation manufacturing process, so as to improve the shortcomings of the known methods that cannot grasp the defects of the manufacturing process and cannot be self-detected by the machine

Method used

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  • Method for maknkig shallow trench isolation zone
  • Method for maknkig shallow trench isolation zone

Examples

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Embodiment Construction

[0017] figure 1 As shown, it is a flow chart of forming a shallow trench isolation region according to a preferred embodiment of the present invention.

[0018] Please refer to figure 1 , first provide a wafer (step 100), this wafer can also be referred to as a product wafer, wherein a mask layer has been formed on this wafer, and it is subsequently used as an etching mask when patterning the wafer screen. In this embodiment, a pad oxide layer is further formed between the mask layer and the wafer to protect the surface of the wafer, and the material of the mask layer is, for example, silicon nitride.

[0019] At the same time, a blank wafer is provided (step 102 ), wherein no photoresist layer, mask layer and other film layers are formed on the blank wafer.

[0020] Then, before performing an etching process on the wafer to define the trenches, the blank wafer is sent into an etching tool to perform an etching process (step 104 ). The etching process includes an etching r...

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PUM

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Abstract

The invention provides a shallow trench insulating region making method, first providing a wafer formed with a covering layer, then providing a blank wafer and sending the blank wafer in an etching machine platform for etching, then viewing the defect number produced by the blank wafer, wherein if the defect number less than a standard value, sending the wafer in the etching machine platform for etching, and defining a trench in the wafer, and then filling an insulating layer in the trench and then removing the covering layer to form the shallow trench insulating region.

Description

technical field [0001] The present invention relates to a manufacturing method of a shallow trench isolation (STI), and in particular to a defect monitoring method in a shallow trench isolation manufacturing process. Background technique [0002] The shallow trench isolation method is a technique that uses anisotropic etching to form trenches in the semiconductor substrate, and then fills the trenches with oxides to form device isolation regions. Since the isolation region formed by the shallow trench isolation method has the advantage of being scalable (Scalable), and can avoid the shortcomings of the bird's beak erosion (Bird's Beak Encroachment) in the traditional area oxidation (LOCOS) method isolation technology, therefore, for sub-micron (Sub-Micron) metal oxide semiconductor (MetalOxide Semiconductor, MOS) manufacturing process, is an ideal isolation technology. [0003] In the shallow trench isolation manufacturing process, island defects are often found in the tren...

Claims

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Application Information

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IPC IPC(8): H01L21/76
Inventor 马思尊张国华
Owner MACRONIX INT CO LTD
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