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Pipeline structure analogue/digital converter of controlling input common-mode drift

A technology of analog-to-digital converters and digital converters, which is applied in the field of pipeline-structured analog-to-digital converters, and can solve the problems of increasing design difficulty and cost

Inactive Publication Date: 2005-01-05
FUDAN UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

This strict requirement on the common-mode voltage of the input signal increases the difficulty and cost of the design.

Method used

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  • Pipeline structure analogue/digital converter of controlling input common-mode drift
  • Pipeline structure analogue/digital converter of controlling input common-mode drift
  • Pipeline structure analogue/digital converter of controlling input common-mode drift

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Embodiment Construction

[0020] Further describe the present invention below in conjunction with accompanying drawing.

[0021] The analog-to-digital converter is composed of an input sample-and-hold circuit 10, a 6-stage margin gain pipeline 11-13, sub-analog-to-digital converters 14-17, sub-digital-to-analog converters 18-20, a pipeline output synchronous circuit 21 and a digital correction circuit 22. . Its circuit block diagram is as image 3shown. The sample-and-hold circuit 10 located at the input end adopts the input signal and holds it, and its output is quantized by the sub-analog-to-digital converter 14 to generate a two-digit digital output; at the same time, the margin gain circuit 11 also samples this output, amplifies the sampling voltage by two times and compares it with the sub-number The conversion structure of the analog-to-analog converter 18 is subtracted as input to the residual gain circuit 12 and the sub-analog-to-digital converter. The sub-ADC 14 generates a 3-bit control si...

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PUM

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Abstract

This invention relates to a mode number converter of a structure suppressing input of common-mode shift composed of an input sample maintainance circuit, 6 stage allowance gain pipelines, 7 sub-mode number converters, 6 sub-digifax converters, a pipeline output synchronous circuit and a connected digit correction circuit, among which, the sample maintainance circuit applies a switch technology of grid boostrap and an independent internal input / output common mode voltage structure at the forefront of the entire pipe line, the 7 sub-mode number converters generate 14 bits data output to get the last 8 bits quantization digit output via the synchronous and digit correction circuits.

Description

technical field [0001] The invention belongs to the technical field of integrated circuits, and in particular relates to a pipeline structure analog-to-digital converter capable of suppressing input signal common-mode voltage drift. Background technique [0002] The design of high-speed analog-to-digital converter is a bottleneck in mixed-signal SoC design, which consumes a lot of chip area, power consumption and design time. At the same time, high-speed medium-resolution analog-to-digital converters are widely used in high-speed data communications, liquid crystal display drivers, digital oscilloscopes, hard disk drive circuits, and high-definition television (HDTV). Early analog-to-digital converters of this type of structure were realized by double-click technology or BiCOMS technology. After the mid-1990s, due to the development of CMOS technology and the improvement of design technology, analog-to-digital converters realized by CMOS technology began to appear. Its adv...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03M1/06H03M1/12
Inventor 任俊彦王照纲施宇锋许俊李宁陈诚毛静文李联郑增钰
Owner FUDAN UNIV
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