Error decoding circuit, data bus control method and data bus system

Abstract

An error decoding circuit comprises a syndrome computing circuit for computing a syndrome on a receive data, an error detecting circuit for detecting an error based on the syndrome, an error pattern computing circuit for computing an error pattern based on the syndrome, and an inverting circuit for performing an error correction of a receive data based on the computed error pattern. Only when there is an error in the receive data, based on the detection result of the error detecting circuit, a request signal for extension of a bus cycle is outputted to a bus master. On the other hand, if there is no error in the receive data, an inputted data is outputted to a data bus without correction. By so doing, the high speed operation of the data bus is executed.

Description

technical field [0001] The present invention relates to data processing for obtaining corrected data by performing error correction processing on received data, to an error correction decoding circuit for decoding received data, a control method for connecting a data bus connected to the error correction decoding circuit, and a control method including the data bus system. Background technique [0002] A method of using an error-correcting code to correct an error in data is known. Here, using Figure 6 A brief description of error correction using error correcting codes. [0003] Figure 6 , the input data is encoded by the encoding circuit 10. The encoding circuit 10 forms check bits based on, for example, a parity check matrix described later, adds the check bits to input data, and generates transmission data. [0004] The transmission data is sent to the transmission path 11, and the transmission path 11 delivers the reception data to the communication destination. T...

AI Technical Summary

Problems solved by technology

[0024] In addition, in the existing structure using a CRC check circuit, since the CRC code is used, it is necessary to perform a CRC check on the error-corrected data, so not only the CRC check for detecting errors in the received data is required Circuit (CRC checking circuit 12f among Fig. 8), also needs the CRC checking circuit (CRC checking circuit 12b among Fig. 8) that the corrected data is used, has the problem that double needs CRC checking circuit

[0025] In addition, since the error correction code is also required for the CRC code, in addition to the problem that the scale of the error correction circuit becomes larger, there is also a problem that the processing time becomes longer.

Images