58results about How to "Work at high speed" patented technology

Disclosed is a power conversion device that is provided with a switching element (130) that is constituted to be capable of high-temperature operation, and that converts AC power supplied from an AC power source or DC power supplied from a DC power source to AC power of a specified voltage and frequency. A snubber circuit (300) is provided that is constituted to be capable of high-temperature operation and that contains a capacitor (301) that is constituted to be capable of high-temperature operation.

In order to improve the quality of a microcrystalline semiconductor film which is formed at an early stage of deposition, a microcrystalline semiconductor film near an interface with a base insulating film is formed under a deposition condition in which a deposition rate is low but the quality of a film to be formed is high; then, a microcrystalline semiconductor film is further deposited at a deposition rate which is increased stepwise or gradually. The microcrystalline semiconductor film is formed in a reaction chamber which is provided in a deposition chamber with space around the reaction chamber, by a chemical vapor deposition method. Further, a scaling gas is supplied into the space to help place the reaction chamber in an ultrahigh vacuum, whereby the concentration of an impurity in the microcrystalline semiconductor film near the interface with the base insulating film is reduced.

The invention discloses a high speed high-oscillation amplitude divide-by-two frequency divider circuit, which belongs to the technical fields of integrated circuit designing and signal processing. Specifically, the circuit mainly comprises two high speed high-oscillation amplitude D triggers which are cascaded. The D trigger of each stage eliminates the bias of a tail current source based on theconventional D trigger having a current-mode logic (CML) structure, and adopts a P-channel metal oxide semiconductor (PMOS) transistor as a load; and simultaneously, a PMOS and N-channel metal oxide semiconductor (NMOS) complementary cross coupling pair structure and the like are adopted by the output stage of the circuit to finally achieve the aims of increasing the oscillation amplitude of an output signal and making the oscillation amplitude of the output signal approximate to full oscillation amplitude under the condition of ensuring the high speed working of the circuit. The circuit not only can directly drive a post circuit, reduces system power consumption to a certain extent, compensates for the shortcomings of a conventional divide-by-two frequency divider, and is suitable for a high speed frequency divider part in a low-power consumption preposed dual-mode prescaler front-end without any additional level conversion amplification circuit.

This optical modulator includes a substrate and a phase modulation unit on the substrate, said phase modulation unit including: a first traveling-wave electrode, a second traveling-wave electrode, and an optical waveguide configured from a first cladding layer, a semiconductor layer, which is laminated on the first cladding layer, and has a refractive index that is higher than that of the first cladding layer, and a second cladding layer, which is laminated on the semiconductor layer, and has a refractive index that is lower than that of the semiconductor layer. The semiconductor layer is provided with: a rib section, which is formed in the optical axis direction of the optical waveguide, and is to be the core of the optical waveguide; a first slab section formed in the optical axis direction on one side of the rib section; a second slab section formed in the optical axis direction on the other side of the rib section; a third slab section formed in the optical axis direction on the first slab section side opposite to the rib section; and a fourth slab section formed in the optical axis direction on the second slab section side opposite to the rib section. The first slab section is formed thinner than the rib section and the third slab section, and the second slab section is formed thinner than the rib section and the fourth slab section.

A programmable frequency divider circuit with symmetrical output is disclosed. The frequency divider includes a non-symmetrical LFSR based component operated in series with a symmetrical divider component. Both the LFSR and the symmetrical divider may be programmed to provide flexibility. The frequency divider can dynamically adjust the divisor of the LFSR component to overcome limitations in the divide resolution due to the series combination of dividers, providing even and odd divisor values. The divider architecture can also provide higher level functions, including synchronization of multiple divider outputs, dynamic switching of divisor values and generation of multi-phased and spaced outputs. The linear feedback shift register (LFSR) component includes a feedback logic network decomposed into multiple stages to realize a maximum latch-to-latch operational latency of one gate delay regardless of the size of the LFSR.

A light-emitting diode driving circuit according to an embodiment of this invention includes a light-emitting diode (1), a first current switch circuit (2) connected in series with the light-emitting diode (1), the first current switch circuit (2) turning on / off a current in accordance with an external input signal input from an input terminal (32), a pulse current generating circuit (3) connected in parallel with the first current switch circuit (2), the pulse current generating circuit (3) supplying a pulse current including a pulse width smaller than the pulse width of the external input signal and shaping a leading edge portion of an optical waveform output from the light-emitting diode (1) into a desired optical waveform, and a discharge circuit (5) connected in parallel with the light-emitting diode (1), the discharge circuit (5) quickly discharging charge stored in the light-emitting diode (1) when the current to the first current switch circuit (2) is turned off.

The invention relates to an amplifier and a display driver including an amplifier, aiming to suppress power dissipation and work in high speed. When an amplifier supplies to a drive line a driving signal based on an input voltage corresponding to a data value indicated by input data, and feeds to an output line a current corresponding to a voltage value on the drive line, the amplifier precharges the drive line at start of increase or decrease of the input voltage. Furthermore, the amplifier stops the precharge when the data value indicated by the input data is smaller than a reference value, or when a difference between a data value at present and a data value immediately therebefore in a series of data values indicated by the input data is smaller than a reference difference value.

An error decoding circuit comprises a syndrome computing circuit for computing a syndrome on a receive data, an error detecting circuit for detecting an error based on the syndrome, an error pattern computing circuit for computing an error pattern based on the syndrome, and an inverting circuit for performing an error correction of a receive data based on the computed error pattern. Only when there is an error in the receive data, based on the detection result of the error detecting circuit, a request signal for extension of a bus cycle is outputted to a bus master. On the other hand, if there is no error in the receive data, an inputted data is outputted to a data bus without correction. By so doing, the high speed operation of the data bus is executed.

The invention discloses a high-speed railway wiper system. The high-speed railway wiper system comprises a driving assembly part, a wiper motor interface, a control switch, a wiper control box, a washing motor interface, a water-deficient sensor interface, a wall-penetrating joint, a scraping arm, a first scraping blade, a scraping blade connecting rod, a second scraping blade, an anti-floating block, a copper scraping arm joint, a scraping arm triangle, and a connecting arm, a scraping blade seat, an anti-loosening nut, a spring fixed rod, a fixed nut, a spring and a nozzle. The scraping blade connecting rod is fixed to one side of the scraping blade seat through a screw, the first scraping blade is fixed to one end of the scraping blade connecting rod through a screw, and the second scraping blade is fixed to the other end of the scraping blade connecting rod through a screw. According to the high-speed railway wiper system, two large load scraping blades are adopted in the first scraping blade and the second scraping blade, the two scraping blade are connected with the scraping blade connecting rod in a bolt mode, the total length of the scraping blades are increased, and the scraping area is increased, the connection mode is safe and reliable, the high-speed railway wiper system is durable and easy to repair and replace, and the high-speed railway wiper system can completely replace imported parts.

The invention discloses a high speed high-oscillation amplitude divide-by-two frequency divider circuit, which belongs to the technical fields of integrated circuit designing and signal processing. Specifically, the circuit mainly comprises two high speed high-oscillation amplitude D triggers which are cascaded. The D trigger of each stage eliminates the bias of a tail current source based on theconventional D trigger having a current-mode logic (CML) structure, and adopts a P-channel metal oxide semiconductor (PMOS) transistor as a load; and simultaneously, a PMOS and N-channel metal oxide semiconductor (NMOS) complementary cross coupling pair structure and the like are adopted by the output stage of the circuit to finally achieve the aims of increasing the oscillation amplitude of an output signal and making the oscillation amplitude of the output signal approximate to full oscillation amplitude under the condition of ensuring the high speed working of the circuit. The circuit not only can directly drive a post circuit, reduces system power consumption to a certain extent, compensates for the shortcomings of a conventional divide-by-two frequency divider, and is suitable for a high speed frequency divider part in a low-power consumption preposed dual-mode prescaler front-end without any additional level conversion amplification circuit.

A thin-film transistor includes a pair of impurity semiconductor layers in which an impurity element imparting one conductivity type is added to form a source and drain regions so as to be overlapped at least partly with a gate electrode with a gate insulating layer interposed between the gate electrode and the impurity semiconductor layers; a pair of conductive layers which is overlapped over thegate insulating layers at least partly with the gate electrode and the impurity semiconductor layers, and is disposed with a space therebetween in a channel length direction; and an amorphous semiconductor layer which is in contact with the gate insulating layer and the pair of conductive layers and is extended between the pair of conductive layers.

An object of the present invention is to provide a semiconductor device using a cheap glass substrate, capable of corresponding to the increase of the amount of information and further, having a high performance and an integrated circuit capable of operating at a high rate. A variety of circuits configuring an integrated circuit are formed on a plurality of glass substrates, the transmission of a signal between the respective glass substrates is performed by what is called an optical interconnect using an optical signal. Concretely, alight emitting element is provided on the output side of a circuit disposed on the upper stage formed on one glass substrate, and a photo-detecting element is formed so as to oppose to the relevant light emitting element on the input side of a circuit disposed on the rear stage formed on another glass substrate. Then, an optical signal converted from an electrical signal outputted from a circuit disposed on the upper stage is outputted from the light emitting element, the relevant optical signal is converted into an electrical signal by a photo-detecting element and inputted into a circuit disposed on the rear stage.

The invention discloses a wire-arranging mechanism of an intermediate drawing take-up machine. The wire-arranging mechanism of the intermediate drawing take-up machine comprises a supporting seat, two screw rods, two collision rods and a smooth bar wire-arranging device, two ends of the screw rods are connected with left and right sides of the lower portion of the supporting seat respectively, the two screw rods are arranged in a front-back mode, a synchronous motor is arranged at one end of each screw rod, the left end of one screw rod located on the front side is provided with a screw thread, the right end of one screw rod located on the rear side is provided with a screw thread, the two collision rods are arranged in a left-right mode, the front end of one collision rod located on the left side is in threaded connection with the left end of the screw rod located on the front side and the rear end of the collision rod is in sliding joint with the left end of the screw rod located on the rear side, the rear end of one collision rod located on the right side is in threaded connection with the right end of the screw rod located on the rear side and the front end of the collision rod is in sliding joint with the right end of the screw rod located on the front side, two ends of a smooth rod shaft of the smooth bar wire-arranging device are connected with two sides of the supporting seat respectively, guide wheels are installed on front and rear sides of the upper portion of the smooth bar wire-arranging device, a synchronous belt wheel is fixed at one end of the smooth rod shaft, and guide rods are installed between left and right sides of the upper portion of the supporting seat. By means of the wire-arranging mechanism of the intermediate drawing take-up machine, problems of complicated structure, difficult adjustment and high costs in terms of existing wire-arranging mechanisms can be solved.

The invention discloses a filling reversing structure. The filling reversing structure is characterized by comprising a cam power device, a reversing control structure and an executing mechanism, wherein the cam power device is used for providing transmission power to the device, and comprises a cam; the middle part of the cam is provided with a through hole for connecting a motor output shaft, and connected with a swinging arm by a cam slot formed in the cam; the end part of the swinging arm is connected with the reversing control structure by a hoop; the reversing control structure comprises an air cylinder and an air cylinder tension rod, wherein the air cylinder tension rod is connected with the air cylinder; the air cylinder drives a control rod to move; the control rod is connected with a hanger control rod mechanism to drive the hanger control rod mechanism to move; the executing mechanism comprises a movable rod which is connected with the reversing control structure, wherein the end part of the movable rod is connected with a rotary valve swinging arm; and the rotary valve swinging arm rotates up and down along with the motion of the movable rod, so that reversing motion is achieved. The filling reversely structure not only achieves transmission integration, but also well achieves transmission automation, so that the operation of the product is stable, the cost is low, a way of controlling a large part with a small part is delicately achieved, and the cost performance is relatively high.

An inductor (1) is provided with: inductor (L11P), the start point of which is connected to terminal (N11P), and which is formed in the shape of a spiral on the outer circumference of an inductor region; inductor (L12P), the end point of which is connected to terminal (N12P), and which is formed in the shape of a spiral on the inner circumference of the inductor region with the end point of inductor (L11P) functioning as the start point of inductor (L12P); and inductor (L13P), the end point of which is connected to terminal (N13P), and which is formed in the shape of a spiral in a region sandwiched by inductor (L11P) and inductor (L12P) with the connecting point of inductor (L11P) and inductor (L12P) functioning as the start point of inductor (L13P).

A control signal generating circuit (1) comprises a comparator (10) for comparing an output voltage VO with a reference voltage outputted from a reference voltage source (11), a flip-flop (12) set by the output of the comparator (10), and a pulse control circuit (13) which receives an input voltage VIN, a reference voltage VREF2, and the inverted output of the flip-flop (12), sets the on time in accordance with the ratio between the input voltage VIN and the reference voltage VREF2, and resets the flip-flop (12) when the on time elapses after the output pulse of the flip-flop (12) rises. The output pulse of the flip-flop (12) is outputted as a control signal into a driver logic circuit (2). The driver logic circuit (2) performs on / off control of NMOSs (3, 4) according to the control signal. Thus, a switching regulator capable of operating at high speed can be realized.

The invention relates to an all-optical switch of a photoelectric device, which is used for solving the problem that an optical passive device has slow response in an optical add-drop multiplexing system and an optical cross connection system of an all-optical high-speed network or cannot work normally at the room temperature. The all-optical switch comprises a multi-quantum dot layer semiconductor optical element of a Bragg structure positioned on a base platform, a control light fiber collimator, a polarizer, a signal light fiber collimator and an analyzer, wherein the multi-quantum dot layer optical element consists of N Bragg-structural composite layers extended and grown from a substrate; and each composite layer consists of a quantum dot layer and a barrier layer. The all-optical switch has the advantages of capability of realizing ultra-fast switching actions, relatively greater switching contrast, relatively lower insertion loss, low saturated pumping efficiency, switching response wavelength in an optical communication waveband, room temperature response characteristic, reliable performance and long service life, can be applied to the optical add-drop multiplexing system and the optical cross connection system and also can directly realize the transmission and routing of heavy traffic of signals in an optical layer.

There is provided a memory circuit including a first memory cell mapped on an address space accessible from a processor, and a second memory cell not mapped on the address space and having the same constitution as that of the first memory cell, wherein a control circuit for executing a control function relating to the memory circuit is included, and an output signal line of the second memory cell is connected to the control circuit.

A light-emitting diode driving circuit according to an embodiment of this invention includes a light-emitting diode (1), a first current switch circuit (2) connected in series with the light-emitting diode (1), the first current switch circuit (2) turning on / off a current in accordance with an external input signal input from an input terminal (32), a pulse current generating circuit (3) connected in parallel with the first current switch circuit (2), the pulse current generating circuit (3) supplying a pulse current including a pulse width smaller than the pulse width of the external input signal and shaping a leading edge portion of an optical waveform output from the light-emitting diode (1) into a desired optical waveform, and a discharge circuit (5) connected in parallel with the light-emitting diode (1), the discharge circuit (5) quickly discharging charge stored in the light-emitting diode (1) when the current to the first current switch circuit (2) is turned off.