30results about How to "Reduce cut-off current" patented technology

Provided is a display device, including a polysilicon thin film transistor, which achieves a reduction of an off current with a simple configuration and with only a slight increase in a number of processes. A display device includes: an insulating substrate, and a thin film transistor formed on the insulating substrate, wherein a semiconductor layer of the thin film transistor has a polysilicon layer, a first amorphous silicon layer formed above the polysilicon layer, and a second amorphous silicon layer formed above the first amorphous silicon layer.

A thin film transistor having excellent electric characteristics, a display device including the thin film transistor, and a manufacturing method thereof are provided. In a thin film transistor in which a microcrystalline germanium film, a gate insulating film in contact with one surface of the microcrystalline germanium film, and a gate electrode overlap with one another and a display device including the thin film transistor, a buffer layer is formed over the other surface of the microcrystalline germanium film. By using a microcrystalline germanium film for a channel formation region, a thin film transistor with high field-effect mobility and high on-current can be manufactured, and by providing a buffer layer between the microcrystalline germanium film functioning as a channel formation region and a source and drain regions, a thin film transistor with low off-current can be manufactured, that is, a thin film transistor with excellent electric characteristics can be manufactured.

A thin film transistor includes, as a buffer layer, a semiconductor layer which contains nitrogen and includes crystal regions in an amorphous structure between a gate insulating layer and source and drain regions, at least on the source and drain regions side. As compared to a thin film transistor in which an amorphous semiconductor is included in a channel formation region, on-current of a thin film transistor can be increased. In addition, as compared to a thin film transistor in which a microcrystalline semiconductor is included in a channel formation region, off-current of a thin film transistor can be reduced.

The invention relates to a method for producing semiconductor chips (2) from a wafer (1) containing a plurality of semiconductor chips (2). When given breaks (14) are produced on the wafer surface after the wafer (1) is completed, and the wafer (1) is broken along these given breaks (14) to separate the semiconductor chips (2), it is possible Defects in the crystal structure of the chip (2) are significantly reduced.

A thin film transistor and a method for fabricating the same are disclosed. The thin film transistor includes: a gate electrode formed on a substrate and having a plurality of horizontal electrode parts spaced apart at regular intervals; a gate insulating film formed over the entire surface of the substrate including the gate electrode; an active pattern formed on the gate insulating film above the plurality of horizontal electrode parts; an etch stop film pattern formed above the active pattern and the gate insulating film so as to overlap top portions of the active pattern and the gate electrode and; a source electrode formed on the active pattern, the gate insulating film, and the etch stop film pattern so as to overlap top portions of adjacent horizontal electrode parts; and a drain electrode formed on the active pattern, the gate insulating film, and the etch stop film pattern so as to overlap top portions of horizontal electrode parts located on the outermost ends.

A stacked photonic III-V semiconductor device has a second metallic connection contact layer at least formed in regions, a highly doped first semiconductor contact region of a first conductivity type, a very low doped absorption region of the first or second conductivity type having a layer thickness of 20 [mu]m-2000 [mu]m, a first metallic connection contact layer at least formed in regions, wherein the first semiconductor contact region extends into the absorption region in a trough shape, the second metallic connection contact layer is integrally bonded to the first semiconductor contact region and the first metallic connection contact layer is arranged below the absorption region. In addition, the stacked photonic III-V semiconductor device has a doped III-V semiconductor passivation layer of the first or second conductivity type, wherein the III-V semiconductor passivation layer is arranged at the upper side of the absorption region at a first distance of at least 10 [mu]m to the first semiconductor contact region.

The invention provides a thin film transistor capable of reducing cut-off current and a display panel with the thin film transistor. The thin film transistor comprises: a gate electrode (2), formed on the surface of the substrate (1); a first amorphous silicon layer (4), formed on the upper side of the gate electrode (2); a plurality of polysilicon layers (51, 52, 53 ), are separated by the first amorphous silicon layer (4), and have the desired spacing dimension and are formed on the upper side of the gate electrode (2); the second amorphous silicon layer (6) and the n+ silicon layer (7), It is formed on the upper side of multiple polysilicon layers (51, 52, 53) and the first amorphous silicon layer (4); the source electrode (8) and the drain electrode (9) are formed on the n+ silicon layer (7).

The invention discloses a manufacturing method of a flash memory, comprising the following steps after forming a grid electrode silicon nitride side wall: 1) depositing a first layer of oxidation film on silicon wafer surface; 2) reverse etching the first layer of oxidation film, etching to a hard masking layer above grid electrode structure, and etching to a silicon substrate on other regions ofthe silicon wafer surface to form a smooth oxidation film side wall; 3) depositing a second layer of oxidation film on the silicon wafer surface; 4) carrying out ion implantation of source leakage; 5) adopting wet etching technology, and simultaneously removing the first layer of oxidation film and the second layer of oxidation film; and 6) depositing an interlayer membrane film on the surface ofthe silicon wafer. Under the condition of changing no other properties of a device, the invention lowers the cut-off current of the device.

Provided are a thin film transistor capable of reducing off-state current and a display panel having the thin film transistor. The thin film transistor comprises: a gate electrode (2) formed on the surface of the substrate (1); a polysilicon layer (5) formed on the upper side of the gate electrode; an amorphous silicon layer (4, 6) formed to cover Above-mentioned polysilicon layer; n+ silicon layer (7), is formed on the upper side of above-mentioned amorphous silicon layer; And source electrode (8) and drain electrode (9) are formed on above-mentioned n+ silicon layer; Above-mentioned polysilicon layer, In a projected state where the source electrode and the drain electrode are projected on the surface of the substrate, a part of the polysilicon layer overlaps with a part of the source electrode and a drain electrode, and is positioned on the source electrode and the drain electrode in the projected state. In the polysilicon layer between the electrodes, the minimum dimension in the width direction perpendicular to the length direction between the source electrode and the drain electrode is smaller than the width direction dimension of the source electrode and the drain electrode.

A semiconductor device in which electrostatic discharge damage during manufacturing steps is prevented. More specifically, a semiconductor device in which electrostatic discharge damage during a step in which the formation of a pixel electrode is completed is prevented. A semiconductor device of the invention comprises a light emitting element, a driving transistor and a protection means disposedbetween the light emitting element and the driving transistor. The protection means comprises as least one of a resistor element, a capacitor element and a rectifier element. More specifically, the protection means is disposed between a pixel electrode of the light emitting element and a source electrode or a drain electrode of the driving transistor. It is to be noted that the rectifier element is an element having a rectifying function and corresponds to a diode or a transistor whose drain electrode and gate electrode are connected to each other.

The invention discloses a ground automatic over-phase-separation arc suppression method. In the process of over-phase, compensation current is output to a power supply circuit composed of a power supply arm, a ground over-phase device and a neutral zone to promote commutation, thereby reducing power receiving The bow cuts off the current when it touches or breaks away from the catenary to suppress the arc. The invention also discloses a suppressing device, which includes a compensation module, which is connected in series in the power supply circuit composed of the power supply arm, the ground over-phase splitting device and the neutral zone, and is used to output compensation current to promote commutation and reduce power receiving. The cut-off current of the bow when it touches or breaks away from the catenary. The invention also discloses a ground automatic phase splitting device, which includes at least two switch assemblies, and the two switch assemblies are respectively connected with the two-phase power supply arm and the neutral zone; the two switch assemblies are connected with the neutral zone as described above The arc suppression device described above. The suppressing method, suppressing device and excessive phase splitting device of the present invention all have the advantages of effectively reducing or avoiding arc generation and the like.

Nickel is introduced to a predetermined region of a peripheral circuit section, other than a picture element section, on an amorphous silicon film to crystallize from that region. After forming gate electrodes and others, sources, drains and channels are formed by doping impurities, and laser is irradiated to improve the crystallization. After that, electrodes / wires are formed. Thereby an active matrix type liquid crystal display whose thin film transistors (TFT) in the peripheral circuit section are composed of the crystalline silicon film whose crystal is grown in the direction parallel to the flow of carriers and whose TFTs in the picture element section are composed of the amorphous silicon film can be obtained.

Disclosed are a synchronous rectifying circuit and a charging circuit comprising the same. The synchronous rectifying circuit comprises a rectifying transistor and a synchronous rectifying control circuit, wherein the synchronous rectifying control circuit is used for generating synchronous rectifying control signals according to the voltage difference between the drain electrode and the source electrode of the rectifying transistor to control on and off of the rectifying transistor. The synchronous rectifying circuit is simple in structure, small in number of devices and low in cost. When applied to the charging circuit, the synchronous rectifying circuit can overcome the problem that a battery is difficult to be fully charged.

The invention discloses a method for manufacturing flash memories. After forming a grid silicon nitride side wall, the method comprises the following steps: 1) depositing a thin oxide film on the surface of a silicon wafer; 2) depositing a nitride film; 3) reversely etching the nitride film deposited in a step 2) and etching the oxide film above a grid structure and in other areas on the surface of the silicon wafer so as to form a flat nitride film side wall; 4) performing source-drain ion implantation; 5) removing the nitride film side wall formed in a step 3); 6) removing the thin oxide film in a step 1) by a wet method; and 7) depositing an interlayer thin film on the surface of the silicon wafer. The method cannot change other characteristics of a device while reducing cut-off current of the device.

A drive circuit for a display device includes a TFT having a source electrode 15, a drain electrode 14, and a gate electrode 13. An electrically isolated light shielding film 12 is provided, which hasa main part for shielding a channel part of the TFT from light and an extension part 20 integrally formed with the main part. An auxiliary capacitance C2 is formed with the extension part 20 and an electrode member 21 integrally formed with the source electrode 15, arranged so as to appear stacked in a plan view. The electrode member 21 may be replaced by an electrode member formed in the same layer as the channel part and connected to the source electrode 15, an electrode member connected to one conduction electrode in another TFT, or an electrode member integrally formed with the gate electrode 13. Thereby, a drive circuit with a small area, including a light-shielded thin film transistor, is provided at a low cost.

The invention discloses a LCD device, comprising a first substrate divided into a pixel part, a first and a second pad part; a gate and a gate line formed in the pixel part of the first substrate; an active pattern formed on the gate in an island shape and provided with a width smaller than that of the gate; an insulation film formed on the first substrate and provided with a first and a second contact hole respectively exposed with the active electrode region and the drain electrode region of the active pattern; an active electrode and a drain electrode, formed in the pixel part of the first substrate and electrically connected with the active electrode region and the drain electrode region of the active pattern through the first and the second contact hole; a data line formed in the pixel part of the first substrate and crossed with the gate line so as to limit the pixel region; an etching barrier structure positioned between the active electrode and the drain electrode and formed as the insulation film; a pixel electrode electrically connected with the pixel electrode; and a second substrate adhered with the first substrate in a face to face mode, the second substrate is a filter substrate.

A semiconductor device includes a first transistor and a second transistor connected to the same power source. Each of the first transistor and the second transistor includes a higher-concentration impurity region of the second conductivity type under the low-concentration channel region disposed between the source region and the drain region of the first conductivity type. The thickness of the gate insulating film of one of the first transistor and the second transistor is made larger than that of the other. According to the present disclosure, off-current in a transistor can be suppressed low.