Embedded signal processor simulator

A signal processor and simulator technology, applied in the field of embedded signal processor simulators, can solve problems such as slow simulation speed and lack of simulation debugging methods, and achieve the effect of high debugging accuracy and debugging efficiency

Inactive Publication Date: 2005-06-01
ZHEJIANG UNIV
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  • Claims
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Problems solved by technology

However, the disadvantage of this method is that the simulation speed is too slow, which is suitable for simulation verification in the early stage of design.
The advantage of the simulatio

Method used

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Embodiment Construction

[0022] The invention proposes to partially modify and expand the standard JTAG protocol, and completes the design of an embedded analog module (EICM) suitable for DSP processors. The advantage of this is that the TAP controller and instruction register provided by the JTAG interface can be fully utilized, and only a small modification of the DSP processor core, the memory management unit and the JTAG interface is required, and there is no need to modify the internal registers of the processor. Replacement, the real-time simulation function of the DSP processor can be completed, and the compatibility with the JTAG protocol can be fully maintained.

[0023] When designing the EICM, using such as figure 1 The structure shown, its connection circuit with the tested processor core is as follows figure 2 . In addition to using the standard TAP module of IEEE1149.1 and the boundary scan chain control module, the EICM simulator has designed the instructions of the JTAG instruction ...

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Abstract

The present invention discloses one kind of microprocessor and computer system, and aims at providing one kind of embedded signal processor simulator capable of completing the function verification of DSP kernel and making the DSP processor possess real-time simulating and verifying functions. The embedded signal processor simulator includes standard TAP module controller, serial/parallel converter circuit module, wrapper circuit module Wrapper and debugger module Debugger. The standard TAP module controller, the instruction register and decoding logic module are connected successively; the scanning chain register, Debugger, by-pass register and IDCODE register are connected in parallel; and it has one end connected to the datan input TDI pin and the other end connected to multiplexer. The present invention is superior to hardware simulator and has high speed and debugging measures.

Description

technical field [0001] The present invention relates to the present invention relates to microprocessor and computer system, more specifically, the present invention relates to a kind of can finish the functional verification to DSP core, and make DSP processor have the embedded signal processor emulator of real-time emulation verification function . Background technique [0002] With the improvement of the complexity of the integrated circuit system and the increase of the chip area, the complexity of the circuit test increases exponentially. On the other hand, with the improvement of chip packaging technology, the traditional bed of needles test method becomes unrealistic. In order to reduce the testing cost of the chip and bring the designed chip to the market as soon as possible, it has become a research hotspot in chip design to adopt a reasonable simulation verification method or adopt testability design for the chip. [0003] Now researchers usually use formal verif...

Claims

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Application Information

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IPC IPC(8): G06F11/36
Inventor 郑德春刘鹏王维东姚庆栋
Owner ZHEJIANG UNIV
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