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Novel power device having surface horizontal 3D-RESURF layer

A power device and horizontal technology, applied in the field of semiconductor power devices, can solve the problems of high cost and poor heat dissipation of devices, and achieve the effects of excellent performance, reduced on-resistance, and reduced conduction loss

Inactive Publication Date: 2005-06-22
UNIV OF ELECTRONICS SCI & TECH OF CHINA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, in this structure, the SJ drift region is made on the insulator, which limits the increase of the breakdown voltage, the heat dissipation performance of the device is poor, and the cost is too high

Method used

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  • Novel power device having surface horizontal 3D-RESURF layer
  • Novel power device having surface horizontal 3D-RESURF layer
  • Novel power device having surface horizontal 3D-RESURF layer

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Embodiment Construction

[0046] By adopting the surface 3D-RESURF layer structure of the present invention, a high-voltage, low-on-resistance power device with excellent performance can be obtained. It can be applied to common power devices such as lateral double-diffused field effect transistors, lateral insulated gate bipolar power transistors (LIGBT), static induction transistors (SIT), lateral thyristors, and PN diodes. With the development of semiconductor device technology, more high-voltage and low-conduction-resistance power devices can be produced by adopting the invention.

[0047] Novel LDMOS power devices with surface lateral 3D-ESURF, such as Figure 5 As shown, including p (or n) substrate 1, n -(or p - ) epitaxial layer 2, n + (or p + ) drain region 6, n + (or p + ) source region 7, p (or n) well 8, drain 9, source 10, gate 11. It is characterized in that it also includes a surface 3D-RESUEF layer 3, and the surface 3D-RESUEF layer 3 is composed of n + (or p + ) semiconductor r...

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Abstract

This invention provides a novel power device with surface transverse 3D-RESURF, which is made by introducing high-doped 3D-RESURF layer on power device surface. Said surface transverse 3D-RESURF layer structure is composed of alternatively arranged opposite conductive type semiconductor area whose boundary is parallel with the surface voltage drop direction of power device, a low resistance pass way for reducing the conduction loss of device. Comparing with normal power device, said invention can reduce conduction resistance by more than 50 % under same voltage withstanding and to be characteristic of having insensitive surface charge conduction resistance and compatible with VLSI technology.

Description

technical field [0001] The invention belongs to the technical field of semiconductor power devices. Background technique [0002] The increasingly wide application of modern integrated circuits puts forward higher requirements on the performance of power devices. For semiconductor high-voltage power devices made of Si materials, a large conduction loss will be generated while increasing the withstand voltage requirements. To reduce This larger on-resistance requires an increase in the size of the device, thereby increasing the manufacturing cost. figure 1 It is a schematic diagram of a conventional LDMOS structure fabricated on bulk silicon. Where, 1 is p (or n) substrate, 2 is n - (or p - ) epitaxial layer, 6 is n + (or p + ) drain area, 7 is n + (or p + ) source region, 8 is a p (or n) well, 9 is a drain, 10 is a source, 11 is a gate, and 22 is a drift region. The drift region 22 used to bear the withstand voltage in this device needs to be doped with a low concent...

Claims

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Application Information

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IPC IPC(8): H01L29/00
Inventor 张波陈林李肇基黄娟郭宇锋
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA