Method and apparatus for thread-based memory access in a multithreaded processor

A multi-threaded processor and memory technology, applied to memory systems, machine execution devices, program control devices, etc., can solve problems such as increased memory access time, processor thread stall, increased power consumption, etc., to reduce memory access time and power consumption, processor performance has no effect

CN1708747AInactive Publication Date: 2005-12-14QUALCOMM INC
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Publication Date
2005-12-14
Estimated Expiration
Not applicable · inactive patent

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Abstract

A thread-based memory access technique for a multithreaded processor is disclosed. The multithreaded processor determines a thread identifier associated with a particular processor thread and uses at least a portion of the thread identifier to select a particular portion of associated memory to be accessed by the corresponding processor thread. In an alternative embodiment, the first part of the thread identifier is used to select one of the plurality of multi-bank storage elements in the memory, and the second part of the thread identifier is used to select a multi-bank storage element within the selected one. One of multiple memory banks. The first part may include one or more most significant bits of the thread identifier, while the second part includes one or more least significant bits of the thread identifier. The present invention advantageously reduces memory access time and power consumption while avoiding any stalling of processor threads.
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Description

[0001] Related application

[0002] The present invention is related to the invention disclosed in the following U.S. patent applications: Attorney Docket No. 1007-6, titled "Multithreaded Processor With Efficient Processing For Convergence Device Applications"; Attorney Docket No. No. 1007-7, titled "Method and Apparatus for Register File Port Reduction in a Multithreaded Processor"; Agent case file No. 1007-8, titled “Token Triggering Method and Apparatus for Token Triggered Multithreading". The above-mentioned application was submitted at the same time, and its content is incorporated here by reference. Technical field

[0003] The present invention generally relates to the field of digital data processors, and more particularly relates to memory access technology used in multithreaded processors. Background technique

[0004] Memory is an important aspect of processor design. As we all know, processors are often used in conjunction with storage systems that include different l...

Examples

Embodiment Construction

[0022] Hereinafter, the present invention will be schematically described according to a situation implemented in a multi-threaded processor, where the multi-threaded processor has a main memory, a multi-threaded cache memory, and a multi-threaded data memory associated therewith. However, it should be understood that the present invention does not require the use of the special multi-threaded processor and memory structure in the exemplary embodiment, and the present invention is generally suitable for use in any multi-thread that is expected to reduce the number of memory ports required and thereby reduce power consumption. Processor memory access application.

[0023] A processing system 100 employing an example of the memory access technology of the present invention will be described with reference to FIGS. 1 and 2.

[0024] FIG. 1 shows a processing system 100 which includes a multi-threaded processor 102 connected to a main memory 104. The multi-thread processor 102 include...