High stability displacement circuit using amorphous silicon thin film transistor

Abstract

The invention discloses high-stable shift circuit used amorphous silicon TFT, which uses two clock pulse signal with inverse phase to control circuit operation mechanism and bias relation of all transistor to make them on alternant drive condition of positive and negative bias and inhibit critic voltage shift, or increase TFT and circuit service time.

Description

technical field [0001] The invention relates to a scanning displacement circuit using an amorphous silicon thin film transistor as a circuit component. The displacement circuit can suppress the displacement phenomenon of the critical voltage of the amorphous silicon thin film transistor element, slow down the degree of critical voltage displacement, and further improve the scanning displacement circuit. Stability, prolong the use time of the displacement circuit. Background technique [0002] In recent years, TFT panel technology has been continuously improved, including the design of driving circuits that can be integrated on the panel. For example, system on glass (SOG) technology can be realized by amorphous silicon (a-Si) process and low-temperature poly-silicon (Low Temperature poly-silicon; LTPS) process. Low-temperature poly-silicon transistors and amorphous silicon transistors have the largest The difference lies in the difference between its electrical properties a...

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Problems solved by technology

However, when the threshold voltage value of NT4 continues to increase, the impedance value between the node P1 and the power supply voltage VSS will also continue to increase, causing the node P1 to be easily affected by other signals or noise and cannot maintain a low level. state VSS

Therefore, the high-level signal VDD of the clock pulse signal CK may affect the low-voltage level VSS of the output terminal OUT through the transistor NT1, distorting the scanning signal provided by the displacement circuit, and causing malfunction of the drive of the display panel.

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