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Non-volatile memory manufacturing method

A non-volatile, manufacturing method technology, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve problems such as endangering the integrity of silicon oxide, silicon oxide thickness restrictions, etc., to improve quality and stability, and prevent leaks The effect of current and simple process

Inactive Publication Date: 2006-05-03
PROMOS TECH INC
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, this approach limits the thickness of silicon oxide (tunneling dielectric) and may compromise the integrity of silicon oxide (as a tunneling dielectric)

Method used

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Embodiment Construction

[0030] The concept of the present invention improves the existing method of fabricating non-volatile memory structures. In the present invention, a charge trapping layer (silicon oxynitride layer) is formed around the charge-storing nano crystals to form a composite memory, and the nano crystals and the charge trapping layer are used to avoid element leakage current. In addition, forming a silicon oxynitride protective layer on the surface of the tunnel oxide layer can increase the dielectric constant. Therefore, the problem of element leakage current can be effectively solved by using the manufacturing method of the non-volatile memory of the present invention. The following examples are used to illustrate the application of the present invention, but not to limit the scope of the present invention. For example, the present invention can be applied to the manufacture of non-volatile memories related to semiconductor technology.

[0031] Figure 1A to Figure 1DIt is a schemat...

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Abstract

The invention relates to a method for making non-volatile storage which provides a substrate and in turn forms an oxide layer, a preserving layer and a semiconductor silicide layer on the substrate, then it oxides the semiconductor silicide layer to form quartz layer and accumulates the semiconductor component of the semiconductor silicide layer on the adjacent between the quartz layer and the oxide layer, then it dose heat craft so that the semiconductor component forms a plurality of semiconductor nanometer crystallization, then it dose azotizing craft so that the partly quartz layer around the semiconductor nanometer crystallization changes into the silicon nitride oxide, then it forms the grid on the quartz layer and the source / leakage area on the substrate of the grid two sides.

Description

technical field [0001] The present invention relates to a manufacturing method of a semiconductor element, and in particular to a manufacturing method of a non-volatile memory. Background technique [0002] Among all kinds of non-volatile memory products, there are multiple data storage, reading, erasing and other actions, and the stored data will not disappear after power off. Electrically Erasable Programmable ROM (EEPROM) has become a memory element widely used in personal computers and electronic devices. [0003] A typical EEPROM uses doped polysilicon to make a floating gate and a control gate. When the memory is programmed, the charges injected into the floating gate are uniformly distributed throughout the polysilicon floating gate layer. However, when there are defects in the tunneling oxide layer under the polysilicon floating gate layer, it is easy to cause leakage current of the device and affect the reliability of the device. Therefore, in order to solve the ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/8247
Inventor 巫勇贤
Owner PROMOS TECH INC