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Television image algorithm checking system and method

A TV image and algorithm verification technology, which is applied in the field of verification system, can solve problems such as prolonging the project cycle, inconvenient algorithm verification, and PC monitors cannot display images correctly, achieving the effect of strong versatility and improved controllability

Inactive Publication Date: 2006-10-11
VIMICRO CORP
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Problems solved by technology

[0003] However, when the output data of the software algorithm platform is in interlaced mode, the PC monitor cannot display the image correctly, and the real display effect can only be seen on the TV, which causes inconvenience to the verification of the algorithm
[0004] At this time, if there is no algorithm verification platform, then the verification of the mode suitable for TV display, such as the interlaced mode, can only be observed on the TV after the hardware implements this algorithm. Only in the later stage can the correctness of the algorithm be evaluated on the display device. If there is a problem with the algorithm at this time, the project cycle will be extended, and the entire system architecture will be changed, increasing the uncontrollability of the project.

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  • Television image algorithm checking system and method

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Embodiment Construction

[0031] The embodiment of the present invention is a set of FPGA-based TV image algorithm verification platform as an example, through which various TV image processing algorithms can be conveniently realized, and the effect of the algorithm can be verified through TV display.

[0032] The process of the verification method provided in this embodiment may include the following steps:

[0033] Step 1: Realize the image processing algorithm through software, process the video data, and generate a data stream suitable for the TV display format;

[0034] Step 2: storing the generated data stream suitable for TV display format;

[0035] Step 3: automatically read the stored data stream, and encode it into a digital signal conforming to the TV standard;

[0036] Step 4: converting the digital signal encoded by the control encoding device into an analog signal output;

[0037] Step 5: Outputting the converted analog signal to a TV for display.

[0038] Wherein, the step 2 may be do...

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Abstract

The disclosed verification system for TV picture algorithm comprise: an algorithm analog device to realize algorithm by software and process data to generate data flow fit to TV display, a memory to store data flow from the analog device, a control and coding device to automatic read out data from the memory and code into the digital signal as TV standard, a DAC to convert the coded signal into analog signal for output. This invention improves project controllability greatly.

Description

technical field [0001] The invention relates to a verification system and method, in particular to a verification system and method for television image algorithms. Background technique [0002] As the current video chip design is becoming more and more complex, it is necessary to evaluate the involved image processing algorithms during project planning. [0003] However, when the output data of the software algorithm platform is interlaced mode, the PC monitor cannot display the image correctly, and the real display effect can only be seen on the TV, which causes inconvenience to the verification of the algorithm. [0004] At this time, if there is no algorithm verification platform, then the verification of the mode suitable for TV display, such as the interlaced mode, can only be observed on the TV after the hardware implements this algorithm. Only in the later stage can the correctness of the algorithm be evaluated on the display device. If there is a problem with the a...

Claims

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Application Information

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IPC IPC(8): H04N5/14H04N5/76
Inventor 桑红刚付军张幼京
Owner VIMICRO CORP
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