Production of non-volatile memory

Abstract

The method comprises: providing a substrate; sequentially forming a first dielectric layer, a charge-trapped layer and a second dielectric layer; forming multi gate stacking structures on said second dielectric layer; wherein each said gate stacking structure has a first gate electrode and roof cover; there is a gap between two adjacent gate stacking structures; forming an oxide layer on the sidewall of said first gate electrode; removing a portion of second dielectric layer not covered by the gate stacking structure; forming a third dielectric layer to overlap the gate stacking structure; forming a second conducting layer on said substrate; removing a portion of second conducting layer in order to form multi second gate electrodes in the gaps between said gate stacking structures; said second gate electrodes and the gate stacking structures composes a storage cell array; respectively forming a source region and a drain region at each side of said storage array.

Description

technical field [0001] The invention relates to a manufacturing method of a semiconductor memory element, in particular to a manufacturing method of a non-volatile memory. Background technique [0002] Among all kinds of non-volatile memory products, it has the advantages of multiple data storage, reading, erasing, etc., and the stored data will not disappear after power off. Program read-only memory (EEPROM) has become a memory element widely used in personal computers and electronic equipment. [0003] A typical EEPROM uses doped polysilicon to make a floating gate and a control gate. Moreover, in order to avoid the problem of misjudgment of data due to excessive erasing phenomenon is too serious during erasing of typical electrically erasable and programmable read-only memory. A select gate is additionally provided on the sidewalls of the control gate, the floating gate, and the substrate to form a split-gate structure. [0004] In addition, in the prior art, a charge ...

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Problems solved by technology

[0007] However, according to the manufacturing method disclosed in the aforementioned application, the composite dielectric layer 104 of the storage unit 102 and the composite dielectric layer 112 of the storage unit 116 are completed in different processes, so the process is relatively cumbersome.

Moreover, since the storage unit 116 is formed between the two storage units 102, the composite dielectric layer 112 of the storage unit 116 is formed on an uneven surface, which may easily cause inconsistent performances of the storage unit 102 and the storage unit 116.

This is because the corner formed by the storage unit 102 and the substrate 100 makes the thickness of the composite dielectric layer 112 of the storage unit 116 non-uniform, which causes the problem of poor reliability of the storage unit 116

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