Method and system for RAM fault testing
Patent Information
- Authority / Receiving Office
- CN ยท China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- HUAWEI TECH CO LTD
- Publication Date
- 2007-03-14
- Estimated Expiration
- Not applicable ยท inactive patent
Smart Images
Figure 1 Figure 2 Figure 3
Abstract
Description
technical field
[0001] The invention relates to the field of memory testing, in particular to a method and system for testing memory faults in an embedded communication device system. Background technique
[0002] As shown in Figure 1: In the embedded communication device system, the processor, memory, bootrom and peripheral I / 0 (input / output) devices constitute a basic system. During the design and manufacture of the system, it is necessary to test the interconnection between the various devices that make up the system and the reliability of the devices themselves to diagnose the faults of the hardware system. There are two types of faults in random access memory (Random-Access Memory, RAM): peripheral interconnection faults and chip internal faults. Among them, the failure of peripheral interconnection can be divided into the failure of data bus, the failure of address bus and the failure of control bus. If the system has a failure of the control bus, the memory will bas...