Upside-down mounted chip packaging method and packaging structure thereof

Abstract

The method for packaging flip chip includes steps: supplying substrate, and the substrate possesses multiple IC substrate units; at least one metal inner connection layer is setup in each IC substrate unit; multiple connection pads are set up on surface of IC substrate unit; next, forming patternized procured adhesion layer to cover the substrate and the connection pads; forming openings to expose partial up surface of each connection pad, and filling conducting material into each opening; then, providing multiple chips, and multiple conductive salient points setup on bottom surface of chip; installing chip on surface of IC substrate unit; finally, dividing up the substrate into multiple structures of packaging flip chip. At least one chip is setup on surface of structure of packaging flip chip.

Description

technical field [0001] The invention provides a flip-chip packaging method and a flip-chip packaging structure, in particular to a packaging method and a flip-chip packaging structure in which a chip is mounted on a flip-chip substrate. Background technique [0002] In recent years, with the miniaturization and high functionality of portable devices such as notebook computers, personal data assistants (PDAs) and mobile phones, and the complexity of functions such as central processing units (CPUs) and memory modules (memory modules), making The semiconductor process not only needs to develop toward high integration, but also needs to develop toward high density (high density) packaging, so various light, thin, short, and small packages are constantly being developed. Compared with the traditional packaging structure, the flip chip (FC) packaging structure has the advantages of fast heat dissipation, low inductance, multiple terminals and small chip size, so the application r...

AI Technical Summary

Problems solved by technology

[0006] To sum up, the substrate of the prior art needs to go through multiple reflow processes, which is a severe test for the reliability of the product

Especially in the lead-free process, the substrate and the bottom sealing material layer often separate due to the thermal expansion coefficient (CTE) mismatch or cause the substrate itself to crack (crack), which cannot guarantee the stable quality of the product

In addition, another shortcoming of the existing technology is that the substrate is shipped in a single shipment to the packaging field for packaging, and then the packaging factory uses a single package for subsequent packaging. In addition to expensive equipment investment, the production capacity Low utilization and relatively high cost, it is a very big resistance to mass production

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