Electrical isolating method for silicon carboride device
An electrical isolation, silicon carbide technology, applied in semiconductor/solid-state device manufacturing, circuits, electrical components, etc., can solve problems such as difficult processing and low yield, reduce production costs, improve performance and yield, and simplify manufacturing processes Effect
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Embodiment 1
[0044] As shown in Figures 5A-5C.
[0045] As shown in FIG. 5A, a first ohmic contact region 5 is formed on the selectively doped region 14 of the SiC MESFET as a source electrode, and a second ohmic contact region 5 is formed on the selectively doped region 15 which is 2 microns to 5 microns away from the first ohmic contact region 5. Two ohmic contact regions 6 serve as drain electrodes. The selectively doped regions 14 and 15 are obtained by implanting nitrogen or phosphorus ions and annealing at high temperature. Preferably, a sacrificial oxide film 7 is deposited on the surface of the SiC MESFET material with a thickness of 50 nm to 500 nm. The sacrificial oxide film includes but is not limited to silicon oxide (SiO 2 ) and silicon oxynitride (SiON), the deposition methods include but not limited to sputtering, electron beam evaporation, plasma enhanced chemical vapor deposition (PECVD); the SiC MESFET material and the surface of the device do not need to be processed by...
Embodiment 2
[0050] As shown in Figures 6A-6D.
[0051] As shown in FIG. 6A, a first ohmic contact region 5 is formed on the ohmic contact layer 4 of the SiC MESFET as a source electrode, and a second The ohmic contact region 6 serves as a drain electrode. Preferably, a sacrificial oxide layer 7 is deposited on the surface of the SiC MESFET material with a thickness of 50 nm to 500 nm. The sacrificial oxide dielectric layer includes but is not limited to silicon oxide (SiO 2 ) and silicon oxynitride (SiON), the deposition methods include but not limited to sputtering, electron beam evaporation, plasma enhanced chemical vapor deposition (PECVD); the SiC MESFET material and device surface do not need to be processed with a photosensitive film 8 The place for etching and ion implantation is protected, and the preferred thickness of the photosensitive film 8 is 2 microns to 8 microns.
[0052] As shown in FIG. 6B, using the photosensitive film 8 as an etching mask, a shallow groove is formed...
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