Ldmos with independently biased source

Abstract

A power metal-oxide semiconductor device provides an P-type base region that includes the N+ device source and is biased differently than the P-type substrate by application of an electrical load. In one embodiment, an LDMOS device with a NPN configuration is used but the coupling of the device source to the base contact prevents the NPN parasitic device from operating. The P-type base is formed in an N-well that separates the base from the P-type substrate and surrounding P-wells. Vertical punch-through is prevented by a high-impurity N+ buried layer that separates the N-well from the P-type substrate.

Description

technical field [0001] The present invention relates to a semiconductor device, in particular to a structure that can allow a bias voltage to be applied in the base region and can limit the vertical electrical breakdown of a high-power metal oxide semiconductor device. . Background technique [0002] Common lateral double diffused metal oxide semiconductor (LDMOS) devices, such as high power metal oxide semiconductor (power MOS), can provide lower on-state resistance in circuit applications. These components are ideal for use at the output of power management circuits because of their low RC time constants. [0003] Common LDMOS structures have a very narrow channel length determined by the smaller P-type base area in the P-type well. The smaller P-type base region is defined by device self-aligned gate locations, one or more field oxide implants, and other reduce surface field (RESURF) structures. To prevent the parasitic bicarrier junction transistor from being turned o...

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Problems solved by technology

[0005] Other power management applications require better protection against electrical breakdown; however, in traditional designs, the depth of N-wells is usually limited due to thermal budget considerations in the process

In the case where the depth of the N-type well is usually limited, the vertical electrical breakdown between the P-type base region and the P-type substrate will become frequent and easy to occur

This electrical breakdown may completely disable the LDMOS or further affect the operation of one or more circuits

[0006] It can be seen that the above-mentioned existing LDMOS elements obviously still have inconvenience and defects in structure and use, and need to be further improved urgently.

In order to solve the above-mentioned problems, the relevant manufacturers have tried their best to find a solution, but no suitable design has been developed for a long time, and the general products do not have a suitable structure to solve the above-mentioned problems. This is obviously related. The problem that the industry is eager to solve

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