202 results about "Electrical breakdown" patented technology

The invention discloses a three-phase intelligent multifunctional electric energy meter, which relates to the technical field of electric meters and comprises an electric meter body, a communication module, a battery body, a first limiting mechanism and a second limiting mechanism. The first limiting mechanism stops the battery body from entering the battery bin when the communication module is not installed in place, and guides the communication module to be installed firstly; and after the communication module is installed, the blocking to the battery compartment is automatically relieved, so that the battery body can be installed smoothly. The second limiting mechanism limits disassembly of the communication module when the battery body is not disassembled, the battery body is guided to be disassembled firstly and then the communication module is disassembled, the communication module is prevented from being mistakenly disassembled in a power-on or power-off state, and therefore the problems of power-off, hot plugging or electrical breakdown and the like of the communication module caused by misoperation can be avoided; and the reliability and the safety in the maintenance process of the electric energy meter are improved.

The invention provides a silicon-based gallium nitride material epitaxial structure based on a silicon substrate, and relates to the technical field of semiconductors. Comprising a silicon substrate, an AlN nucleating layer, a buffer layer, a GaN functional layer and a device layer which are sequentially laminated, wherein the thickness of the AlN nucleating layer is related to the geometrical shape and the geometrical size of the silicon substrate; the buffer layer comprises a stepped AlGaN sub-buffer layer and a semi-insulating GaN sub-buffer layer; the step-level AlGaN sub-buffer layer comprises a plurality of step-level AlGaN sub-buffer layers, and the sub-buffer layer attribute of each step-level AlGaN sub-buffer layer is related to the thermal stress constraint of the step-level AlGaN sub-buffer layer; the stepped AlGaN sub-buffer layer and the semi-insulating GaN sub-buffer layer are respectively in contact with the AlN nucleating layer and the GaN functional layer; and the semi-insulating GaN sub-buffer layer has a semi-insulating GaN sub-buffer layer thickness which is optimized based on an electric breakdown theory and thermal stress balance collaboratively.

The invention relates to the technical field of electrical engineering, in particular to a composite material dielectric breakdown multi-scale simulation method and device, and the method comprises the steps: calculating the electric field intensity of a grid based on a preset geometric structure of a nano composite material, and calculating the electric field intensity of the grid based on material parameters and structure parameters of the nano composite material; calculating the molecular interaction energy of the interface between the nanofiller and the matrix; calculating a target breakdown probability of the grid by utilizing the electric field intensity and molecular interaction energy, generating a target state parameter of the grid based on the target breakdown probability, determining a target breakdown strength value meeting a condition by utilizing the target state parameter, and performing Weber distribution fitting processing on the target breakdown strength value to obtain a target breakdown strength value; and determining a simulation result of the breakdown strength of the nano composite material. Therefore, the problems that most of breakdown simulation methods in the prior art are single-scale models, the interfacial effect is not fully considered, errors in the aspect of quantitative prediction of the breakdown strength are large, and the accuracy of breakdown simulation is reduced are solved.

Liquefied natural gas brings energy overriding and environmental disruption. However, the liquefied natural gas is a liquid dielectric medium, can be easily liquefied by pressurizing at room temperature, can be expanded by more than 250 times in volume during gasification, and is relatively high in dielectric constant and relatively low in voltage resistance. As a capacitor, such a liquid dielectric is considered; the energy of the liquid dielectric capacitor is consumed inside the capacitor for an engine, welding or buoyancy gas generation, or is consumed outside the capacitor for use as an on-board capacitor for a vehicle. [Solution] A liquid dielectric capacitor is considered as a dielectric breakdown induced igniter that can replace a conventional spark plug. In order to utilize the principle of such an igniter as an energy source for an engine, a welding device or a buoyancy bag for lifting a subsea resource, an electrical charge is applied to the liquid dielectric thin layer, and then the thickness of the liquid dielectric thin layer is made close to zero to cause dielectric breakdown, or the thickness of the liquid dielectric thin layer is increased to cause breakdown of the liquid dielectric thin layer. A high voltage source is established for a vehicle-mounted capacitor of the vehicle. Therefore, a world without environmental damage is realized.

The invention relates to a vertical cavity semiconductor optical amplifier and a use method thereof, and belongs to the technical field of semiconductor optical amplifiers, the vertical cavity semiconductor optical amplifier sequentially comprises an N-surface electrode, an N-surface insulating layer, a substrate, an active region, a P-surface insulating layer and a P-surface electrode, the N-surface electrode and the P-surface electrode both comprise a cathode, an anode and a discharge cavity, the cathode discharges to break down discharge gas in the discharge cavity to generate the low-temperature plasma electrode, a plurality of leakage holes are evenly distributed in the N-face insulating layer and the P-face insulating layer, the cathode and the anode are electrically connected with a discharge power source, and the N-face electrode and the P-face electrode are electrically connected with a driving power source. The technical problems that in the prior art, due to the current crowding effect, a vertical cavity semiconductor optical amplifier of an electric pump is limited in clear aperture, limited in amplification capacity and low in output power can be solved.

A capacitor header for coupling a voltage output from a capacitor, which allows the capacitor to store a large amount of charge and then discharge this as a high voltage, while reducing the risk of dielectric breakdown. The capacitor header includes a live output plate connected to a central live conductor of the capacitor and a ground output plate connected to a ground conductor of the capacitor. The capacitor header also includes first and second insulating members, which both have non-planar mating surfaces that interleave to form a non-linear path. An insulating seal is included between the non-planar mating surfaces. The capacitor header also includes two sets of insulating sheets. The sets of insulating sheets extend beyond an outer perimeter of the live output plate and the ground output plate.

The invention relates to the technical field of dielectric energy storage materials, in particular to a polymer-based composite dielectric and a preparation method and application thereof. The preparation method comprises the following steps: providing a polymer matrix and a filler precursor; dissolving the polymer matrix in a solvent, adding the filler precursor, and stirring to obtain a mixture solution; and coating the mixture solution on a substrate, and performing heat treatment to enable the filler precursor to generate an inorganic filler in situ in the polymer matrix, thereby obtaining the polymer-based composite dielectric. The method is simple in process, raw materials are easy to obtain, cost is low, stability is high, the dispersity of the prepared polymer-based composite dielectric is obviously improved, meanwhile, the polymer-based composite dielectric has high dielectric constant and breakdown strength, the dielectric-breakdown inversion coupling relation is broken through, the high-temperature energy storage performance is obviously improved, and the polymer-based composite dielectric can be compatible with industrial large-scale production and has wide application prospects. And a feasible solution is provided for research and development of a high-energy-storage-density dielectric material with practical application value.

The invention relates to the technical field of power cables, in particular to a high-toughness polyethylene insulated power cable and a preparation method thereof. The invention relates to a preparation method of a high-toughness polyethylene insulated power cable. The preparation method comprises the following steps: preparation of a toughening flame-retardant modifier, preparation of a montmorillonite compound, preparation of a toughening modified montmorillonite compound and preparation of the polyethylene insulated power cable. Through specific material mixing and grafting modification, the performance of the cable insulation layer is remarkably improved. The deep trapped charge trapping capability is enhanced, space charge accumulation and electric field distortion are avoided, the DC voltage level and the operation safety are improved, and the dielectric loss and the aging speed are reduced; the dispersibility of montmorillonite is also optimized, a physical reinforcing network is formed, and the mechanical property and the electric breakdown resistance are improved; meanwhile, toughening and flame retardance are coordinated, the problem of embrittlement caused by a traditional flame retardant is solved, and the service life of the insulating layer is comprehensively prolonged.

The invention discloses an evaluation method and device for a breaking result of a high-voltage SF6 circuit breaker, electronic equipment and a storage medium, and belongs to the field of power system protection, and the method comprises the steps: obtaining a reference arc extinguishing peak voltage and a reference contact opening distance of the high-voltage SF6 circuit breaker; obtaining a to-be-measured arc extinguishing peak voltage and a to-be-measured contact opening distance of the high-voltage SF6 circuit breaker; calculating the ratio of the to-be-measured arc extinguishing peak voltage to the preset power of the to-be-measured contact opening distance, and generating a to-be-evaluated index value; calculating an on-off evaluation critical value according to the reference arc extinguishing peak voltage, the reference contact opening distance and a preset critical value coefficient; and judging whether the to-be-evaluated index value is greater than the cut-off evaluation critical value, if so, judging that the predicted cut-off result is successful, and if not, judging that the predicted cut-off result is failed. Therefore, by implementing the invention, the problem that electric breakdown failure and successful breaking cannot be distinguished due to similar voltage characteristics in the prior art can be solved.

The invention discloses a flame-retardant breakdown-resistant capacitor base film and a preparation method thereof. The flame-retardant breakdown-resistant capacitor base film is prepared from the following raw materials in parts by weight: 100 parts of polypropylene; 3.5 to 8.5 parts of a compatilizer; 14-25 parts of a flame-retardant dielectric modified filler; 0.3 to 1 part of an antioxidant; 0.5 to 1.8 parts of a nucleating agent; wherein the flame-retardant dielectric modified filler is a composite microcapsule obtained by coating the core material with nano magnesium hydroxide as a core material and silicon dioxide modified polydopamine as a wall material. The flame-retardant dielectric modified filler is added into a polypropylene system, so that the prepared polypropylene capacitor base film can be endowed with excellent flame retardance, the mechanical strength of the base film can be improved, the dielectric constant of the base film can be improved, the electric breakdown resistance of the polypropylene capacitor base film can be improved, and the comprehensive performance of the polypropylene capacitor base film can be improved.

The invention discloses a high bias transition carbon fiber composite material vacuum coating method, and relates to a carbon fiber composite material vacuum coating technology. The invention aims to solve the problems of high-voltage breakdown of resin and etching damage of carbon fibers caused by high-bias-voltage transition deposition of vacuum coating on the surface of the existing carbon fiber resin-based composite material. The method comprises the following steps: 1, fixing the carbon fiber composite material on the electric insulator; 2, bias voltage self-glow plasma cleaning; 3, depositing a transition layer; and 4, depositing a working coating. On the basis of an initial non-conductive mode of an electric insulator, during plasma pretreatment, the problems of electric breakdown of non-conductive resin and etching damage of conductive and low-sputtering-resistance carbon fibers are effectively solved, and non-homogeneous conductive and low-sputtering-resistance material surface bias self-glow plasma cleaning is achieved; according to the invention, the aluminum and copper coatings with compact structures are deposited by adopting HiPIMS, so that the electromagnetic wave absorption and multiple emission absorption effects are improved, and the overall electromagnetic shielding performance of the material is enhanced.

To prevent a semiconductor element including a plurality of transistors and diodes connected to each other from causing insulation breakdown of diodes between channels by test current.SOLUTION: A power semiconductor element test device comprises: a driver circuit 113m including a terminal connected to a first voltage terminal, a second voltage terminal and a gm gate terminal; a driver circuit 113s including a terminal connected to a third voltage terminal, a fourth voltage terminal and a gs gate terminal; a constant current circuit 116m including a fifth voltage terminal; a constant current circuit 116s including a sixth voltage terminal; and a voltage generation circuit 138 generating second voltage (Vpm1) with first voltage (Vmm1) of the first voltage terminal as reference and fourth voltage (Vps1) with third voltage (Vms1) of the third voltage terminal as reference. The second voltage (Vpm1) is applied to the second voltage terminal and the fourth voltage (Vps1) is applied to the fourth voltage terminal. The first voltage (Vmm1) and the third voltage (Vms1) are in floating relation.SELECTED DRAWING: Figure 11

The utility model provides a dielectric breakdown measurement circuit and a semiconductor detection device. The dielectric breakdown measurement circuit includes: an adjustable voltage source; the first end of the divider resistor is electrically connected with the adjustable voltage source, and the second end of the divider resistor serves as a voltage division output end; the tested circuit is electrically connected with the partial voltage output end; the input end of the detection circuit is electrically coupled to the voltage division output end, and the detection circuit is configured to convert a signal of the voltage division output end into a detection signal. In the breakdown process of the to-be-detected wafer, the change condition of the signal of the partial pressure output end is detected so as to reflect the breakdown degree of the to-be-detected wafer at any time, intermittent dielectric breakdown of the wafer can be prevented, electric breakdown and overlong detection time are further prevented, and the electric breakdown efficiency, the wafer electrostatic discharge efficiency and / or the wafer detection efficiency are remarkably improved. The voltage provided by the adjustable voltage source can also be used as a breakdown voltage, so that an extra electric breakdown circuit is not independently provided for the wafer to be tested.

Provided are a polypropylene film that has excellent structural stability relative to heat, is suitable for use in high-voltage capacitors or the like, and, when used in a high-voltage capacitor, has excellent long-term reliability in high-temperature environments; a metal layer laminated film that uses the polypropylene film; and a film capacitor. The polypropylene film has the sum of F5 values for the longitudinal direction and the width direction at 130° C. of at least 15 MPa and, for dielectric breakdown testing at 130° C., a dielectric breakdown voltage (B150) (V / μm) after heat treating for 1 minute at 150° C. and a dielectric breakdown voltage (B0) (V / μm) without heat treating satisfy the following relationship.(B150) / (B0)≥0.80

The invention discloses a copper interconnection structure and a forming method thereof. The forming method comprises the following steps: providing a substrate; forming a dielectric layer on the substrate; forming a copper conductive structure in the dielectric layer; forming a covering layer on the dielectric layer; and performing first ultraviolet curing treatment on the covering layer and the dielectric layer. Heat assistance of the first ultraviolet curing treatment can help copper ions remaining on the surface of the dielectric layer to diffuse towards the interior of the dielectric layer so as to reduce the concentration of the copper ions on the surface of the dielectric layer. In addition, the first ultraviolet curing treatment can repair the damage of the surface of the dielectric layer in the planarization treatment process, so that the compactness of the top area of the dielectric layer is increased, and diffusion or drift of copper ions is hindered. In addition, the bonding strength between the dielectric layer and the covering layer can be enhanced through the first ultraviolet curing treatment, so that diffusion or drifting of copper ions is hindered. Therefore, after the covering layer is formed, the first ultraviolet curing treatment is favorable for weakening copper diffusion in the dielectric layer, so that the dielectric breakdown resistance of copper interconnection is enhanced.

This invention discloses a high-voltage ceramic capacitor with a reinforced concave structure, aiming to solve the problem of insufficient edge breakdown withstand voltage in traditional ceramic capacitors due to edge effects. The capacitor includes a ceramic core composed of a ceramic dielectric. Its innovation lies in the fact that the upper and lower electrode surfaces of the ceramic core are not planar, but rather form a concave structure that curves inward from the center, causing the ceramic body thickness to gradually increase from the center to the edge. This structure significantly improves the edge breakdown withstand capability through the synergistic effect of electric field homogenization and improved molding density. This invention significantly improves the power frequency withstand voltage of the capacitor to over 3.5kV per millimeter, while also exhibiting excellent comprehensive electrical performance such as low loss, high insulation, and high partial discharge initiation voltage. Furthermore, the manufacturing process is simple, does not increase volume, and has strong industrial applicability.

The composite filler filler forms a core-shell structure composed of a core substance made of carbon, metal, zinc oxide or zirconium oxide and a shell substance attached to a surface of the core substance. The shell substance is formed from fumed oxide particles, the fumed oxide particles being attached to a part or a whole of the surface of the core substance by mixing of the fumed oxide particles and the core substance in a dry ball mill. The fumed oxide particles are particles changed from bulky aggregated particles to gathered bulk particle. In the composite filler, percentage of the core substance ranges from 30 vol % to 85 vol % and percentage of the shell substance ranges from 15 vol % to 70 vol %, a thermal conductivity is 0.075 W / m·K or more, a volume resistivity is 1.0×105 Ω·cm or more, and a dielectric breakdown voltage is 1 kV / mm or more.

This application relates to an aerosol generator for an aerosol supply device. The aerosol generator comprises an aerosol generating material and a resistance heating layer comprising a resistance heating element. The resistance heating element is configured to heat at least a portion of the aerosol generating material, and the aerosol generating material is located in the resistance heating layer. The resistance heating element comprises a first type of electrical contact and a second type of electrical contact, and the resistance heating element extends between the first type of electrical contact and the second type of electrical contact. The resistance heating element has a dielectric breakdown voltage, and when the dielectric breakdown voltage is exceeded, the resistance heating element is disabled in response to a control signal.

The invention relates to the technical field of biosensors, and particularly discloses a preparation method of a multi-channel solid nanopore array. The method comprises the following steps: respectively constructing a group of parallel and independent micro-channels on the front and back surfaces of a chip prepared with a suspended dielectric film window array, enabling the micro-channels on the two surfaces to be orthogonally arranged in space, integrating an independent electrode in each micro-channel, and injecting electrolyte; the electrodes of the micro-channel on one side and the electrodes of the micro-channel on the other side are selectively connected through an external control circuit, namely controllable electric fields can be established on the two sides of the thin film window at the unique intersection point corresponding to the electrodes, so that addressing and selective dielectric breakdown of the window are achieved, all the windows on the whole chip are automatically and sequentially addressed, traversed and processed, and the yield of the chip is improved. And forming a nanopore array. By means of the method, a large number of nanopore arrays can be controllably manufactured on a single chip at a time, and nanopore array machining with high throughput, low cost and high consistency is achieved.

The present invention provides a training device that improves insulation performance of a substrate after coating.　A training device (1) for obtaining a trained model for inferring the coating condition of a substrate provided with a conductor and an electronic component. The training device (1) comprises: a training data acquisition unit (11) for acquiring first input data and second input data; and a model generation unit (12) for generating a trained model for inferring second input data from the first input data. The first input data includes: substrate information including information on the type and shape of the substrate; conductor information including information on the type and pattern of the conductor; electronic component mounting information including information on the type, shape, and arrangement position of the electronic component; coating material information including information on insulation performance of the coating material; and substrate use environment information including a voltage waveform applied to the conductor on the substrate. The second input data is a coating condition for dielectric breakdown of the coating material to be suppressed or aerial discharge in the substrate to be suppressed.

A memory structure and a method for forming the same include: providing a substrate comprising a plurality of active regions and isolation regions located on either side of the active regions; sequentially forming a first sub-floating gate layer and a control gate dielectric layer on the active regions; using a first photoresist layer having a connection opening pattern as a mask, etching the control gate dielectric layer until the surface of the first sub-floating gate layer is exposed, thereby forming a connection opening; forming a control gate layer on the control gate dielectric layer, with the control gate layer completely filling the connection opening; using a second photoresist layer having an isolation opening pattern as a mask, etching the control gate layer and the control gate dielectric layer until the surface of the first sub-floating gate layer is exposed, thereby forming an isolation opening, a control gate, and a second sub-floating gate layer, wherein the control gate and the second sub-floating gate layer are located on either side of the isolation opening. A second sub-floating gate layer is added to the first sub-floating gate layer, thereby increasing the thickness of the floating gate and the etching window of the floating gate, thereby avoiding perforation and electrical breakdown caused by excessively thin floating gates.

This invention discloses a three-phase intelligent multi-functional energy meter, relating to the field of energy meter technology, comprising a meter body, a communication module, a battery body, a first limiting mechanism, and a second limiting mechanism. The first limiting mechanism blocks the battery body from entering the battery compartment when the communication module is not properly installed, guiding the installation of the communication module first. After the communication module is installed, it automatically releases the obstruction to the battery compartment, allowing the battery body to be installed smoothly. The second limiting mechanism restricts the disassembly of the communication module when the battery body is not removed, guiding the removal of the battery body before the communication module, preventing accidental removal of the communication module while it is powered on or off. This helps avoid problems such as power loss, hot-swapping, or electrical breakdown of the communication module due to misoperation, improving the reliability and safety of energy meter maintenance.

A disclosed electron source includes: (A) a graphene layer having an electron emission area on a surface of the graphene layer; and (B) a p-type semiconductor layer that is in direct contact with the graphene layer and forms a Schottky junction with the graphene layer. In this way, the electrons are accelerated in the depletion layer in the p-type semiconductor layer. Moreover, unlike the MIS type electron source, since the electrons are not accelerated in the insulator layer, the dielectric breakdown caused by a large number of electrons travelling in the valence band of the insulator does not occur, and a long lifespan electron source can be realized. Note that the aforementioned p-type semiconductor layer preferably has a depletion layer having a width of 2.91 nm or more and 30 nm or less.

This application discloses an insulating assembly, an electrical connector, and a vehicle. The insulating assembly includes an insulating pad with opposing first and second insulating surfaces, the second insulating surface being adapted to face a circuit board. The insulating pad also includes clearance holes and insulating elements. The clearance holes connect the first and second insulating surfaces and are used for transmitting conductive devices. The insulating elements are at least disposed on the second insulating surface and between adjacent clearance holes. The insulating assembly of this application can prevent electrical breakdown and creepage of conductive devices within the vehicle during use.

The invention relates to the technical field of enameled wire production, and in particular to a method for quickly judging the failure mechanism of a corona-resistant enameled wire. The judgment method comprises the following steps: S1, selecting a corona-resistant enameled wire to be judged; a detection solution consisting of salt, water and phenolphthalein; S2, placing the corona-resistant enameled wire to be judged in the detection solution and performing a leakage point test, wherein the leakage point test comprises the following steps: S21, energizing the corona-resistant enameled wire to be judged; S22, after energizing, observing reddened leakage points on the corona-resistant enameled wire to be judged; and S23, judging the failure mechanism of the corona-resistant enameled wire to be judged based on the reddened leakage points: if there are two reddened leakage points, the failure mechanism of the corona-resistant enameled wire to be judged is electrical breakdown failure; if there are three or more reddened leakage points, the failure mechanism of the corona-resistant enameled wire to be judged is corona breakdown failure; and if there are no reddened leakage points, the insulation performance of the corona-resistant enameled wire is qualified. The judgment method can quickly and accurately judge the failure mechanism of the corona-resistant enameled wire, and has the advantages of easy operation and low cost.

The utility model relates to a mutual inductor and electrical equipment, and relates to the technical field of high-low voltage electrical appliances, the mutual inductor is provided with a detection through hole, an electric conductor penetrates through the detection through hole, the mutual inductor comprises a detection assembly and a shell, the detection assembly surrounds the outer peripheral side of the electric conductor, and the detection assembly is used for detecting the electric conductor; the shell comprises a first shell and a second shell, the first shell and the second shell define a containing cavity, the containing cavity surrounds the detection through hole, and the detection assembly is located in the containing cavity; the first shell is provided with at least one first isolation wall, the second shell is provided with at least one second isolation wall, the first isolation wall and the second isolation wall are both of an annular structure, and at least parts of the first isolation wall and the second isolation wall are mutually sleeved. According to the mutual inductor, the problem that creepage breakdown is likely to happen at the joint of the shell of the mutual inductor, and use and safety are affected can be solved.

The invention belongs to the technical field of semiconductor devices, and particularly relates to a light-emitting diode structure with an electrostatic protection function, which comprises an insulating base, a transparent lampshade arranged on the end surface of the insulating base, a conducting ring, a light-emitting diode chip, a light-emitting diode chip and a light-emitting diode chip, the conductive ring is fixedly connected to the outer side wall of the transparent lampshade in a sleeving mode, the conductive ring is fixedly connected with the top of the insulating base, the outer side wall of the transparent lampshade and the side wall of the insulating base are each coated with a transparent conductive coating, the electrostatic breakdown unit is installed at the bottom of the insulating base, and the conductive ring is provided with a conductive assembly. Weak electrostatic charges can be timely guided to leave the outer surface of the light-emitting diode to be gathered, static electricity can be utilized to break down air to generate airflow, dust on the surface of the light-emitting diode is eliminated through the airflow, the electrostatic charges can be prevented from invading a semiconductor light-emitting element to affect the light-emitting effect, and dust can be automatically removed.

This utility model relates to a multifunctional thermally conductive coating. The thermally conductive coating includes, from bottom to top, a base layer for adhesion, a thermally conductive layer forming a thermally conductive network structure, an insulating layer that increases dielectric breakdown voltage, and a heat dissipation layer that accelerates heat dissipation and reduces interfacial thermal resistance. This multifunctional thermally conductive coating, through the adhesion of the base layer, enables effective connection between the coating and thermally conductive pads. Simultaneously, the thermally conductive layer, insulating layer, and heat dissipation layer contribute to high thermal conductivity, thus achieving a balance between thermal conductivity and adhesion, improving the functionality of the thermally conductive coating. Furthermore, the heat dissipation layer can be connected to heat dissipation devices, further enhancing the balance between thermal conductivity and adhesion.

One objective of the present disclosure is to provide a structure for a semiconductor device in which the reliability of the device is improved without causing an electrical loss during operation of a semiconductor element. A semiconductor device (51) of the present disclosure comprises a conductive heat dissipation component (4). The heat dissipation component (4) has a plurality of column sub-regions (4b) and a plate sub-region (4a) provided between the plurality of column sub-regions (4b). The heat dissipation component (4) is provided at a distance from the plurality of semiconductor elements (6) such that a sealing resin layer (8) between the heat dissipation component (4) and the plurality of semiconductor elements (6) does not cause dielectric breakdown during excitation operation of the plurality of semiconductor elements (6).Furthermore, the heat dissipation component (4) is electrically isolated from the majority of semiconductor elements (6).

A semiconductor device in which an electrification phenomenon that leads to characteristic fluctuations, element deterioration, or dielectric breakdown is inhibited is provided. A first transistor, a second transistor, a third transistor, and a fourth transistor are included over a substrate; the fourth transistor includes a first conductor, a second conductor, a third conductor, and an oxide semiconductor; the first conductor is electrically connected to the semiconductor substrate through the first transistor; the second conductor is electrically connected to the semiconductor substrate through the first transistor; the third conductor is electrically connected to the semiconductor substrate through the first transistor; and the fourth conductor is electrically connected to the semiconductor substrate through the first transistor.