Method and apparatus for power management of graphics processors and subsystems thereof

Abstract

A graphics processing device implementing a set of techniques for power management, preferably at both a subsystem level and a device level, and preferably including peak: power management, a system including a graphics processing device that implements such a set of techniques for power management, and the power management methods performed by such a device or system. In preferred embodiments, the device includes at least two subsystems and hardware mechanisms that automatically seek the lowest power state for the device that does not impact performance of the device or of a system that includes the device. Preferably, the device includes a control unit operable in any selected one of multiple power management modes, and system software can intervene to cause the control unit to operate in any of these modes. For example, the device can include a register interface to which an external processor can write control bits to select among the modes. Preferably, the control unit is operable in a subsystem power management mode in which the hardware mechanisms prevent assertion of clocks to idle subsystems, and disable generation of clocks that are not used by non-idle subsystems, or a device power management mode in which power consumption is controlled at levels of broader scope than individual subsystems, such as by disabling generation of a device clock, preventing assertion of a device dock to circuitry of the device, controlling device clock frequencies, and controlling voltage regulators employed to provide power to the device. Peak power management in accordance with the invention is designed to artificially limit the peak power drawn by the device to a predetermined thermal design point by dynamically lowering clock frequencies or voltage or both when power consumption exceeds a threshold. The invention can be implemented to reduce power consumption in mobile computing systems and is also applicable to desktop systems for example to manage peak power requirements.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS [0001] The application is a divisional of, and claims priority benefit of, co-pending U.S. patent application Ser. No. 09 / 972,414, titled “Method And Apparatus For Power Management Of Graphics Processors And Subsystems Thereof”, filed Oct. 5, 2001, having common inventors and assignee as this application. The subject matter of the related patent application is hereby incorporated by reference.TECHNICAL FIELD OF THE INVENTION [0002] The present invention relates to methods and apparatus for power management of graphics chips (graphics processors implemented as integrated circuits), graphics cores (portions of graphics chips), and systems including graphics processors. BACKGROUND OF THE INVENTION [0003] Typically, most of the power consumed by a graphics processor (“GPU”) while it renders video data for display is consumed as a result of the toggling of clocks within the GPU. [0004] Conventional methods for power management of processing circuit...

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