Field effect transistors with vertically oriented gate electrodes and methods for fabricating the same

Abstract

In semiconductor devices, and methods of formation thereof, both planar-type memory devices and vertically oriented thin body devices are formed on a common semiconductor layer. In a memory device, for example, it is desirable to have planar-type transistors in a peripheral region of the device, and vertically oriented thin body transistor devices in a cell region of the device. In this manner, the advantageous characteristics of each type of device can be applied to appropriate functions of the memory device.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS [0001] This application is a continuation-in-part application of U.S. Ser. No. 10 / 945,246, filed Sep. 20, 2004, and further claims priority under 35 U.S.C. §119 to Korean Patent Application 10-2005-0029721 filed on Apr. 9, 2005, the entire contents of each being incorporated herein by reference.BACKGROUND OF THE INVENTION [0002] The present invention relates to semiconductor devices, and more specifically, to thin body transistors and methods for fabricating the same. [0003] In recent years, semiconductor devices have become highly integrated to achieve a combination of high-performance, high-speed, and economic efficiency. However, as semiconductor devices become more highly integrated, a variety of operational and structural problems may arise. For example, as the channel length of a typical planar field effect transistor becomes shorter, short channel effects, such as punch-through, may occur, parasitic capacitance, for example junction cap...

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Benefits of technology

[0007] In some embodiments according to the present invention, a field effect transistor in a non-volatile EPROM may include a T-shaped gate electrode having a lateral portion on a top surface of a semiconductor substrate and having a vertical portion at least partially inside a cavity defined by opposing sidewalls of a vertically protruding portion of the substrate. In other embodiments, the T-shaped gate electrode may be a first T-shaped gate electrode and the cavity may be a first cavity. The transistor may further include a second T-shaped gate electrode having a lateral portion on a top surface of the substrate and having a vertical portion at least partially inside a second cavity defined by opposing sidewalls of the vertically protruding portion of the substrate. The lateral portion of the second T-shaped gate electrode may be substantially parallel to the lateral portion of the first T-shaped gate electrode, and the vertical portion of the second T-shaped gate electrode may be substantially parallel to the vertical portion of t

Problems solved by technology

However, as semiconductor devices become more highly integrated, a variety of operational and structural problems may arise.

However, such devices may be susceptible to floating body effects, which may be caused by heat generated during device operation and/or an accumulation of high-energy hot carriers.

In addition, a back bias voltage cannot be applied to compensate for changes in threshold voltag

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