Method of manufacturing a semiconductor package using a lead frame having through holes or hollows therein

Abstract

A lead frame comprises a stage for mounting a semiconductor chip thereon, a plurality of leads arranged in the periphery of the stage, and a plurality of lead interconnection members (e.g., dam bars) for interconnecting the leads, wherein a plurality of through holes are formed to penetrate through the lead frame in a thickness direction with respect to the leads or the lead interconnection members so as to allow a plurality of cutting lines to pass therethrough, whereby the leads are subjected to cutting and are made electrically independent of each other. A semiconductor package of a QFN type is produced by enclosing the lead frame within a molded resin, from which the leads are partially exposed to the exterior and are subjected to plating and are then subjected to cutting at the cutting lines.

Description

CROSS REFERENCES TO RELATED APPLICATIONS [0001] This application is a Divisional of application Ser. No. 10 / 811,999, filed Mar. 30, 2004, which claims priority to Japanese Patent Application No. 2003-99126 and Japanese Patent Application, entitled METHOD OF MANUFACTURING A SEMICONDUCTOR PACKAGE USING A LEAD FRAME HAVING THROUGH HOLES OR HOLLOWS THEREIN, the entire disclosure of which is incorporated herein by reference.BACKGROUND OF THE INVENTION [0002] 1. Field of the Invention [0003] This invention relates to semiconductor packages for mounting semiconductor chips using lead frames, which are attached onto circuit boards. This invention also relates to methods for manufacturing semiconductor packages using lead frames. [0004] 2. Description of the Related Art [0005] Conventionally, leads frames are used for semiconductor packages incorporating semiconductor chips. A typical example of the lead frame for use in the conventionally-known semiconductor package is shown in FIG. 13, whe...

AI Technical Summary

Benefits of technology

[0013] It is an object of the invention to provide a semiconductor package that can improve a reliability in terms of the electrical connection with a circuit board.

[0017] In the above, after plating is performed on appropriate portions of the leads and / or the lead interconnection members, the leads and / or the lead interconnection members are subjected to cutting, whereby a plated film reliably remains in the interior wall of the through hole that forms the side surface of the lead in its thickness direction. That is, it is possible to increase the overall solder adhesion area with respect to the leads, which can be therefore improved in the joining strength with the solder.

[0018] Compared with the lead frame in which a relatively small through hole is formed with respect to each of the leads, the lead frame in which a relatively large through hole is formed in each of the lead interconnection members across the plurality of leads is advantageous because the overall plated area can be increased with respect to the side surfaces of the leads after the lead interconnection members are cut out, and hence, it is possible to easily increase the overall solder adhesion area with respect to the leads.

[0020] In the above, after the leads and / or the lead interconnection members are subjected to cutting at the cutting lines, plated films reliably remain in the interior walls of the through holes that form the side surfaces of the leads in thickness direction. Hence, it is possible to easily increase the overall solder adhesion area with respect to the leads, which can be therefore improved in the joining strength with the solder.

[0021] In the semiconductor package, the leads are partially exposed to the exterior of the molded resin, wherein the side surface of the exposed portion of the lead in its thickness direction provides a plated surface and a cut surface that adjoins the plated surface and that makes the adjoining leads to be electrically independent of each other. Due to the formation of the plated surface on the side surface of the lead exposed from the molded resin, it is possible to increase the solder adhesion area with respect to the lead, Which is thus improved in the joining strength with the solder.

[0022] In addition, the ‘plated’ backside of the lead adjacent to the plated surface on the side surface of the lead forms the same plane together with the lower surface of the molded resin, whereby when the semiconductor package is mounted on the circuit board in such a way that the lower surface is placed opposite to the surface of the circuit board, it is possible to reduce the height dimensions of the semiconductor package measured from the surface of the circuit board; in short, it is possible to reduce the thickness dimensions of the semiconductor package.

Problems solved by technology

Hence, there is a problem in that reliability secured for the electrical connection established between the semiconductor package 80 and the circuit board 71 may be reduced.

However, in the QFN package in which the lead 57 is not substantially projected outside of the molded resin 63 so that the other surfaces of the lead 57 adjoining the cut surface 57d are covered with the molded resin 63, this method cannot contribute to enhancement of the joining strength established between the cut surface 57d of the lead and the solder 67; that is, it cannot solve the aforementioned problem.

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