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In-situ chamber cleaning for an rtp chamber

a technology for rtp chambers and insitu chambers, which is applied in the direction of cleaning processes and equipment, lighting and heating equipment, chemistry equipment and processes, etc. it can solve the problems of affecting the temperature at which the wafer is heated, the crystallinity is disrupted, and the dopants cannot come to res

Inactive Publication Date: 2008-05-22
APPLIED MATERIALS INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Benefits of technology

The present invention provides a method for cleaning a chamber used for annealing doped wafer substrates. The method involves removing impurities deposited in the chamber after annealing by flowing volatilizing gases into the chamber and applying heat to volatilize the impurities, which are then exhaustively removed. The technical effect of this invention is to provide a more efficient and effective way to clean the chamber for further annealing processes, ensuring high quality and purity of the substrates.

Problems solved by technology

Ion implantation of chemical impurities disrupts the crystallinity of the semiconductor substrate over the range of the implant.
However, the implanted dopants will not come to rest on electrically active sites in the substrate.
This deposition may interfere with temperature pyrometer readings and with the radiation distribution fields on the wafer, which in turn affects the temperature at which the wafer is annealed.
Deposition of the outgassed impurities may also cause unwanted particles on the wafers and may also generate slip lines on the wafer.
The wet clean process requires manual intervention to clean the deposited material from the chamber walls and from the reflector plate, which may be labor intensive and requiring the chamber to be offline for about four hours.

Method used

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  • In-situ chamber cleaning for an rtp chamber
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  • In-situ chamber cleaning for an rtp chamber

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[0025]FIG. 3 is a process flow diagram illustrating a method for removal of the volatile contaminants deposited on the chamber walls and on the reflector plate during the annealing process, according to an embodiment of the invention. In this embodiment phosphorus doped substrate wafers are introduced into an annealing chamber (steps 310 and 320) and annealed (step 330) as described above in relation to step 230 in FIG. 1. Upon annealing of the phosphorus doped substrate wafers, the doped substrate wafers phosphorus may outgas phosphorus from the substrate wafers. This phosphorus may deposit on the colder walls and on the reflector plate of the chamber during the annealing. Conventionally, the annealing chamber requires a wet clean for about every 250 wafers annealed to remove the phosphorus and any other potential deposits. However, the number of mean wafers between clean (MWBC) can be dramatically increased by performing an “oxygen bake” of the chamber as described herein. After s...

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Abstract

A method of cleaning a chamber used for annealing doped wafer substrates. In one embodiment the method provides removing dopants deposited in an annealing chamber after an annealing process of a doped substrate by flowing one or more volatilizing gases into the annealing chamber, applying heat to volatilize the deposited dopants in the annealing chamber, and exhausting the chamber to remove volatilized dopants from the annealing chamber.

Description

BACKGROUND OF THE INVENTION[0001]1. Field of the Invention[0002]Embodiments of the present invention generally relate to the fabrication of integrated circuits. More specifically, embodiments of the invention pertain to methods of removing residue from the interior surfaces of a substrate processing chamber.[0003]2. Description of the Related Art[0004]The manufacture of modern logic, memory, or linear integrated circuits (ICs) typically requires more than four hundred process steps. A number of these steps are thermal processes that raise the temperature of a semiconductor wafer to a target value to induce rearrangements in the atomic order or chemistry of thin surface films (e.g., diffusion, oxidation, recrystallization, salicidation, densification, flow).[0005]Ion implantation is a preferred method for introduction of chemical impurities into semiconductor substrates to form the pn junctions necessary for field effect or bipolar transistor fabrication. Such impurities include p-ty...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): B08B7/04
CPCB08B7/00B08B5/00H01L21/324B08B7/0071
Inventor RAMACHANDRAN, BALASUBRAMANIANKIM, TAE JUNGSUN, JUNG HOONLEE, JOUNG WOOLIM, HWA JOONGLEE, SANG PHILRANISH, JOSEPH MICHAEL
Owner APPLIED MATERIALS INC