High frequency delay circuit and test apparatus

Abstract

A high frequency delay circuit operable to output a high frequency signal delayed for a desired delay time. The high frequency delay circuit includes: a variable delay circuit operable to receive a reference signal of which a frequency is lower than the high frequency signal, and to output a delay reference signal delayed from the reference signal for the desired delay time in advance; and a multiplier operable to generate the high frequency signal, of which a frequency is a frequency of the delay reference signal multiplied by a predetermined value, and to output the generated high frequency signal at timing according to a phase of the delay reference signal.

Description

[0001]The present application is a continuation application of PCT / JP2004 / 017553 filed on Nov. 26, 2004 which claims priority from a Japanese Patent Application No. 2003-398817 filed on Nov. 28, 2003, the contents of which are incorporated herein by reference.BACKGROUND OF THE INVENTION[0002]1. Field of the Invention[0003]The present invention relates to a high frequency delay circuit which delays a high frequency signal to a desired phase. More particularly, the present invention relates to a high frequency delay circuit used for a test apparatus operable to test an electronic device.[0004]2. Description of the Related Art[0005]Conventionally, a test apparatus for testing an electronic device includes a pattern generator which generates a test pattern used for a test of the electronic device, a waveform shaper which forms the test pattern, and timing generator which generates timing at which the test pattern formed by the waveform shaper is to be output. For example, timing generat...

AI Technical Summary

Benefits of technology

The present invention provides a high frequency delay circuit and a test apparatus that can overcome the problems of previous delay circuits. The circuit includes a variable delay circuit and a multiplier that can output a high frequency signal with a desired delay time. The circuit can also include a phase comparator, a voltage controlled oscillator, a divider, an exclusive OR circuit, and a duty comparator to control the delay time and reduce jitters. The technical effects of the invention include improved accuracy and reliability of high frequency delay circuits, as well as improved test equipment for testing the circuits.

Problems solved by technology

However, it is difficult to delay a high frequency clock.

For example, in case that the clock is to be delayed using rounding of the edges of the clock, it is difficult to sufficiently delay each edge when the rise time of the clock or the like becomes short.

Therefore, it is more difficult to delay the high frequency signal compared with a low frequency clock.

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