Semiconductor package and method for manufacturing the same

Abstract

A semiconductor package includes a carrier, a chip, a stiffener and an encapsulant. The chip is disposed on the carrier. The stiffener is disposed around the chip, directly contacts the carrier, and is mounted on the carrier. The encapsulant is adapted to seal the chip and the stiffener.

Description

CROSS REFERENCE TO RELATED APPLICATION[0001]This application claims the priority benefit of Taiwan Patent Application Serial Number 097119025, filed on May 23, 2008, the full disclosure of which is incorporated herein by reference.BACKGROUND OF THE INVENTION[0002]1. Field of the Invention[0003]The present invention generally relates to a package, and more particularly to a semiconductor package, wherein the mechanical robustness of a stiffener that can prevent a carrier (e.g. substrate) from warping during subsequent thermal processes. Also, the stiffener can be directly mounted on the carrier by the attaching force of an encapsulant. It is not necessary that the stiffener is attached on the carrier by an extra adhesive, thereby decreasing the processing step of the semiconductor package.[0004]2. Description of the Related Art[0005]Due to chips having high performance are required, a chip package having a thin type substrate is increasingly put in use. For example, the chip package ...

AI Technical Summary

Benefits of technology

[0012]It is an object of the present invention to provide a semiconductor package, wherein the mechanical robustness of a stiffener that can prevent a carrier (e.g. substrate) from warping during subsequent thermal processes. Also, the stiffener can be directly mounted on the carrier by the attaching force of an encapsulant. It is not necessary that the stiffener is attached on the carrier by an extra adhesive, thereby decreasing the processing step of the semiconductor package.

[0014]The stiffener includes metal or any other solid material which has an enough mechanically robustness. The height of the stiffener of the present invention can be smaller than that of the chip, and the enough mechanical robustness of the stiffener that can prevent the carrier (e.g. substrate) from warping during subsequent thermal processes. Compared with the prior art, the height of the stiffener of the present invention is smaller than that of the chip so as to cause the stiffener of the present invention to have smaller volume. Thus, the stiffener of the present invention is more economical, and is easily sawed. Furthermore, the stiffener can include a groove adjacent to the carrier. The groove can increase an attaching area (i.e. an attaching force) between the encapsulant and the stiffener so as to directly mount the stiffener on the carrier. In addition, the stiffener of the present invention can be directly mounted on the carrier by the attaching force of the encapsulant. It is not necessary that the stiffener of the present invention is attached on the carrier by an extra adhesive, thereby decreasing the processing step of the semiconductor package.

Problems solved by technology

However, a thin type substrate has a problem of warping.

Due to the different CTE's of various conductive and insulating materials used in the BGA package after the BGA package is packaged, the BGA package having the thin type substrate may be warped seriously during subsequent thermal processes (e.g. a reflow process).

The warping of the BGA package may cause the substrate not to be co-plane so as to further have a problem of solder ball joints.

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