Methods and Apparatus for Soft Data Generation for Memory Devices Based on Performance Factor Adjustment

Inactive Publication Date: 2011-07-07
AVAGO TECH WIRELESS IP SINGAPORE PTE
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Benefits of technology

[0009]Generally, methods and apparatus are provided for soft data generation for memory devices based on a performance factor adjustment. According to one aspect of the invention, at least one soft data value for a memory device is generated by obtaining at least one read value; and generating the soft data value based on the obtained at least one read value and an adjustment based on on

Problems solved by technology

While these existing methods have helped to improve the decoding performance of flash memories, they suffer from a number of limitations, which if overcome, coul

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  • Methods and Apparatus for Soft Data Generation for Memory Devices Based on Performance Factor Adjustment

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Embodiment Construction

[0026]Various aspects of the present invention are directed to soft data generation techniques for improved decoding in memory devices, such as single-level cell or multi-level cell (MLC) NAND flash memory devices. As used herein, a multi-level cell flash memory comprises a memory where each memory cell stores two or more bits. Typically, the multiple bits stored in one flash cell belong to different pages. While the invention is illustrated herein using memory cells that store an analog value as a voltage, the present invention can be employed with any storage mechanism for memory devices, such as the use of voltages, currents or resistances to represent stored data, as would be apparent to a person of ordinary skill in the art.

[0027]FIG. 1 is a schematic block diagram of a conventional flash memory system 100. As shown in FIG. 1, the exemplary flash memory system 100 comprises a flash control system 110 and a flash memory block 160. The exemplary flash control system 110 comprises...

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Abstract

Methods and apparatus are provided for soft data generation for memory devices based on a performance factor adjustment. At least one soft data value is generated for a memory device, by obtaining at least one read value; and generating the soft data value based on the obtained at least one read value and an adjustment based on one or more performance factors of the memory device. The read values may comprise, for example, data bits, voltage levels, current levels or resistance levels. The read values may be soft data or hard data. The possible performance factors include endurance, number of read cycles, retention time, temperature, process corner, inter-cell interference impact, location within the memory array and a pattern of aggressor cells. One or more pattern-dependent performance factors and/pr location-specific performance factors may also be considered. The generated soft data value may be a soft read value that is used to generate one or more log likelihood ratios, or may be the log likelihood ratios themselves.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS[0001]The present application claims priority to U.S. Provisional Patent Application Ser. No. 61 / 194,751, filed Sep. 30, 2008, and International Patent Application Serial No. PCT / US09 / 49333, filed Jun. 30, 2009, entitled “Methods and Apparatus for Soft Demapping and Intercell Interference Mitigation in Flash Memories,” each incorporated by reference herein.[0002]The present application is related to International Patent Application entitled “Methods and Apparatus for Soft Data Generation for Memory Devices,” International Patent Application entitled “Methods and Apparatus for Soft Data Generation for Memory Devices Using Reference Cells,” and International Patent Application entitled “Methods and Apparatus for Soft Data Generation for Memory Devices Using Decoder Performance Feedback,” each filed simultaneously herewith and incorporated by reference herein.FIELD OF THE INVENTION[0003]The present invention relates generally to flash memory devic...

Claims

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Application Information

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IPC IPC(8): G06F11/00
CPCG11C7/02G11C7/04G11C11/5642G11C16/0483G11C16/26G06F11/1068G11C2211/5634G06F2212/2022G06F2212/1032G06F12/0246G11C16/3418G11C11/16G06F11/1012G11C16/34G11C7/10G11C11/5607
Inventor HARATSCH, ERICH F.YEN, JOHNSON
Owner AVAGO TECH WIRELESS IP SINGAPORE PTE
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