Processing core with programmable microcode unit

Abstract

A method and circuit arrangement utilize a programmable microcode unit that is capable of being programmed via software to modify the instruction sequences output by the microcode unit in response to microcode instructions issued to the microcode unit. Among other benefits, a programmable microcode unit consistent with the invention enables customization of a processor design to handle specific applications or tasks, as well as to support specific hardware configurations such as specific execution units. In addition, a programmable microcode unit may be updatable, e.g., to correct bugs or faults found in previous instruction sequences supported by the unit.

Description

FIELD OF THE INVENTION[0001]The invention is generally related to data processing, and in particular to processor architectures and microcode units incorporated therein.BACKGROUND OF THE INVENTION[0002]As semiconductor technology continues to inch closer to practical limitations in terms of increases in clock speed, architects are increasingly focusing on parallelism in processor architectures to obtain performance improvements. At the chip level, multiple processing cores are often disposed on the same chip, functioning in much the same manner as separate processor chips, or to some extent, as completely separate computers. In addition, even within cores, parallelism is employed through the use of multiple execution units that are specialized to handle certain types of operations. Pipelining is also employed in many instances so that certain operations that may take multiple clock cycles to perform are broken up into stages, enabling other operations to be started prior to completi...

AI Technical Summary

Benefits of technology

This patent proposes a method and circuit arrangement that uses a programmable microcode unit to modify instruction sequences output by the microcode unit. This allows for customization of a processor design to handle specific applications or tasks and support specific hardware configurations. The programmable microcode unit can also be upgraded to correct bugs or faults found in previous instruction sequences. Overall, this technology enables greater flexibility and adaptability in processor design.

Problems solved by technology

However, as computers and other programmable electronic devices continue to be integrated deeper and deeper into every aspect of society, and as programmable chips such as microprocessors, microcontrollers, Application Specific Integrated Circuits (ASIC's) and the like continue to increase in complexity and power while costs, the design, verification and testing of such programmable chips has become a significant contributor to the overall costs of such chips.

Nonetheless, increasing specialization of processor designs often limits the ability to reuse components in different designs.

From the perspective of a microcode unit, for example, limits on the size of the unit often limits the number of microcode instructions that can be supported.

Furthermore, instruction sets are often limited in size, so allocating a large number of the available instructions in an instruction set to a microcode unit limits the other types of instructions that can be supported.

Consequently, conventional microcode units are typically relatively small and limited in scope, and optimized for handling a few specialized instruction sequences.

Another shortcoming of conventional microcode units is that since the units are designed to support a specific set of microcode instructions and instruction sequences, any faults in the designs are essentially fabricated as hard coded logic in the processor chips themselves, so there is typically no way to correct any such faults in any manufactured chips.

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