Bipolar transistor manufacturing method

Abstract

A method for manufacturing a bipolar transistor, including the steps of: forming a first surface-doped region of a semiconductor substrate having a semiconductor layer extending thereon with an interposed first insulating layer; forming, at the surface of the device, a stack of a silicon layer and of a second insulating layer; defining a trench crossing the stack and the semiconductor layer opposite to the first doped region, and then an opening in the exposed region of the first insulating layer; forming a single-crystal silicon region in the opening; forming a silicon-germanium region at the surface of single-crystal silicon region, in contact with the remaining regions of the semiconductor layer and of the silicon layer; and forming a second doped region at least in the remaining space of the trench.

Description

BACKGROUND[0001]1. Technical Field[0002]The present disclosure relates to bipolar transistors formed on an integrated circuit. More specifically, the present disclosure relates to a method for manufacturing such a transistor.[0003]2. Description of the Related Art[0004]In integrated circuits, it may be advantageous to integrate, on a same wafer, MOS transistors and bipolar transistors (integration better known as “BiCMOS”). Indeed, these two types of transistors have specific advantages. In particular, MOS transistors allow fast switchings for digital processings, while bipolar transistors have a particularly good performance at high frequencies, for example, higher than some hundred GHz, and may have a high output power. Thus, these last transistors may be used to form circuits for controlling optical circuits, for example, lasers.[0005]Thus, methods for simultaneously manufacturing MOS transistors and bipolar transistors on a same substrate are needed.[0006]FIG. 1 illustrates an e...

AI Technical Summary

Benefits of technology

The patent text describes a method for manufacturing an integrated bipolar transistor with high frequency performance. The method is compatible with current MOS transistor manufacturing processes. The transistor has a structure including a semiconductor layer, insulating layers, and a trench. A single-crystal silicon region is formed in the opening of the trench, and a silicon-germanium region is formed at the surface of the silicon region. A second doped region is formed at least in the remaining space of the trench. The transistor also has access regions to the semiconductor layer and the silicon layer. The method includes steps of forming shallow insulating trenches, defining an opening, and forming spacers on the walls of the trench. The transistor can be used in integrated circuits with MOS transistors. The technical effects of the patent text include improved performance and compatibility with current manufacturing processes.

Problems solved by technology

A first disadvantage of a bipolar transistor such as that in FIG. 1 is its bulk.

Such a depth is not compatible with recent methods for manufacturing MOS transistors on substrates of silicon-on-insulator type (SOI) where the upper substrate is very thin (thickness smaller than 15 nm).

It should be noted that the forming of single-crystal silicon for the access to the base is not compatible with the above method, a growth or a deposition of single-crystal silicon being impossible to perform on an insulating material.

Thus, the bipolar transistor of FIG. 1 has junction capacitances and access resistances which are generally not compatible with a high-performance bipolar transistor.

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