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Thermally enhanced semiconductor package

a technology of semiconductors and packaging, applied in the direction of semiconductor devices, semiconductor/solid-state device details, semiconductor devices, etc., can solve the problems of increasing the thermal stress on the chip, reducing the reliability reducing the thermal performance of the integrated circuit, so as to improve the thermal package structure and methods.

Inactive Publication Date: 2011-09-13
MAXIM INTEGRATED PROD INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The present invention provides improved thermal package structures and methods for manufacturing the same, by incorporating one or more thermal spreaders embedded inside the package. The thermal spreader helps to reduce the chip's temperature, allowing it to function at cooler levels. This results in higher levels of heat spreading, which can allow for the chip to handle higher power densities. The thermal enhancement also allows for die shrink, where the chip can be made smaller without compromising its performance. The improved thermal performance also allows for smaller package footprints, as the chip can be made with a smaller size but still perform at the same level. The thermal spreader can be integrated with the semiconductor die or the carrier, and it can be placed between them or act as an adhesive. The invention also provides methods for producing semiconductor packages that include a thermal spreader. The technical effects of the invention include improved thermal performance, reduced power density limitations, and smaller package footprints.

Problems solved by technology

Integrated circuits, also referred to chips, microchips, or semiconductor dies, are fragile and susceptible to many factors, such as mechanical stresses, chemical stresses, and thermal stresses.
However, the addition of material around the integrated circuit from the packaging can increase the thermal resistance and thereby increase thermal stresses on the chip.
These thermal stresses can reduce the reliability of the integrated circuit and, in some cases, can result in its catastrophic failure.
When inside a package, the thermal resistance created by the packaging can inhibit the chip's ability to dissipate this generated heat.
The thermal issues become more acute with increasing levels of power dissipation.
These thermal issues amplify the possibilities of decreased chip performance and failure due to excess heat.

Method used

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Embodiment Construction

[0028]In the following description, for purpose of explanation, specific details are set forth in order to provide an understanding of the invention. It will be apparent, however, to one skilled in the art that the invention may be practiced without these details. One skilled in the art will recognize that embodiments of the present invention, some of which are described below, may be incorporated into a number of different systems and devices.

[0029]Components shown in block diagrams are illustrative of exemplary embodiments of the invention and are meant to avoid obscuring the invention. It shall also be understood that throughout this discussion that components may be described as separate units, which may comprise sub-units, but those skilled in the art will recognize that, in embodiments, the various components, or portions thereof, may be divided into separate components or may be integrated together.

[0030]Furthermore, connections between components within the figures are not i...

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Abstract

Disclosed are systems and methods for improving the thermal performance of integrated circuit packages. Aspects of the present invention include improved thermal package structures and methods for producing the same through the application of one or more thermal spreaders in the package. In embodiments, a thermal spreader is incorporated in a semiconductor chip package between a semiconductor die and its die pad. By including a thermal spreader in an IC package, the package can handle higher levels of power while maintaining approximately the same temperature of the package or can reduce the temperature of the package when operating at the same power level, as compared to a package without a thermal spreader.

Description

BACKGROUND[0001]A. Technical Field[0002]The present invention relates generally to systems and methods for integrated circuit (“IC”) packaging. And, the present invention relates more particularly to systems and methods for improving the thermal performance of integrated circuit package solutions.[0003]B. Background of the Invention[0004]Integrated circuits, also referred to chips, microchips, or semiconductor dies, are fragile and susceptible to many factors, such as mechanical stresses, chemical stresses, and thermal stresses. Prior to being used in an electronic system, an integrated circuit must be packaged to help minimize the impact of these stress factors. Packaging helps protect against mechanical stresses by providing structural support to the integrated circuit. By encapsulating the integrated circuit in a package, the integrated circuit is protected against environmental factors such as dust, moisture, and other items that could cause chemical stress or otherwise affect t...

Claims

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Application Information

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Patent Type & Authority Patents(United States)
IPC IPC(8): H01L23/10H01L23/495
CPCH01L23/4334H01L23/49568H01L24/32H01L23/49575H01L2924/01019H01L2924/01006H01L24/48H01L2924/14H01L2924/01082H01L2924/01079H01L2924/01078H01L2924/01074H01L2224/32145H01L2224/32245H01L2224/48091H01L2224/48247H01L2224/73265H01L2924/01005H01L2924/01029H01L2924/01033H01L2924/01047H01L2924/00014H01L2924/00012H01L24/73H01L2924/181H01L2924/351H01L2924/00H01L2224/45099H01L2224/45015H01L2924/207
Inventor RAILKAR, TARAK A.CATE, STEVEN D.
Owner MAXIM INTEGRATED PROD INC
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