11results about How to "Improve compilation speed" patented technology

According to the abstract syntax tree optimization method based on the ST language, the ST programming language is optimized through the compiler front-end technology, the code structure is optimized from the source, the compiling efficiency is improved, and the execution efficiency of the finally generated instruction is improved. An abstract syntax tree optimization method based on an ST language comprises the steps that 1, an antlr tool is used for conducting lexical analysis and grammatical analysis of the ST language, and a complete abstract syntax tree is created; (2) traversing the abstract syntax tree to carry out constant merging, calculating constant tree nodes in advance, and merging the constant tree nodes into a tree node; (3) traversing the abstract syntax tree to eliminate dead codes, and deleting useless tree nodes; and (4) traversing the abstract syntax tree to calculate characteristic values of the tree nodes, and eliminating sub-expressions according to the similarity of the tree nodes, thereby reducing redundant calculation and improving execution efficiency.

The invention relates to the technical field of chip compiling and mapping, in particular to a coarse-grained reconfigurable chip mapping method and device based on pre-scheduling. The method comprises the following steps: compiling an intermediate representation through the front end of a compiler according to an input program; constructing a data flow diagram structure according to the intermediate representation; carrying out pre-scheduling according to the data flow diagram and the reconfigurable chip structure information to obtain an operation time period; searching the mapping result according to a pre-allocated time period, and determining a final mapping scheme; configuration information for execution on the coarseness reconfigurable chip is generated. According to the method, the complexity of a mapping algorithm can be effectively reduced, the execution performance of the task on the coarseness reconfigurable chip is improved, heterogeneous resources on the coarseness reconfigurable chip are fully considered in the mapping process, the method is suitable for multi-node and complex-structure data flow diagram mapping in complex tasks, and the mapping efficiency is remarkably improved.

The invention discloses a parallel compiler compiling method and system supporting multiple operating systems, which can fully utilize the advantages of a multi-processor or multi-core system and process a plurality of compiling tasks at the same time by acquiring a parallel compiling file, thereby greatly shortening the compiling time. The parallel compiling can significantly improve the compiling speed of large files, especially for complex software projects, the development cycle can be accelerated, and the development efficiency can be improved. A main function node is transformed, AST tree nodes corresponding to operating system interfaces are generated in combination with parallel compiling parameters, and then the AST tree nodes are inserted into an AST tree for node transformation operation, so that compiled files can run on a plurality of operating systems. According to the method, the barrier between different operating systems is broken, a developer does not need to independently write and maintain codes of different versions for each operating system, and the development and maintenance cost is reduced. The method allows adjustment according to different parallel compilation parameters to adapt to various compilation requirements.

The invention relates to the technical field of industrial control, and provides a target program running method and device, electronic equipment and a storage medium. The method comprises the steps of obtaining a target program comprising at least two program organization units, and determining at least one target program organization unit from the target program; compiling each target program organization unit to obtain an executable file corresponding to each target program organization unit; according to each executable file, generating a symbol table file corresponding to each target program organization unit; the executable file and the symbol table file are downloaded to the controller, so that when the controller executes the executable file, the controller determines the jump address through the symbol table file to jump and run, only the target program organization unit is compiled, compiling of all the program organization units is avoided, the compiling speed is increased, and the compiling efficiency is improved. Subsequently, a symbol file table is generated through the executable file corresponding to each target program organization unit, and then independent operation of each executable file is achieved.

The invention provides a method and a system for improving project compiling speed. The method comprises the following steps: analyzing; downloading the integration into the project; compiling, packaging and copying and compressing; uploading the compressed file; carrying out modification according to the podspec description file of the source code component; and pushing to a binary index warehouse of a corresponding environment. The system comprises an analysis module, an analysis script, a search module, a modification module, a downloading module, a compiling and packaging module, a copying module and an uploading module. According to the scheme, the universality is high, all the components of the project are supported, meanwhile, the components do not need to be independently compiled, the system can be rapidly accessed and used, the project compiling and package outputting efficiency is rapidly improved, and the project development iteration efficiency is improved.

The invention discloses a system source code automatic clipping method and device, equipment, a storage medium and a product, and relates to the technical field of system optimizing.The method comprises the steps that a compiling option key value pair in a system configuration file and a Makefile in a system source code are obtained; according to the compiling option key value pair, extracting a dependency relationship between the compiling option name and the Makefile from the Makefile; selecting a target source code set corresponding to the customized kernel from the system source codes according to the dependency relationship; and determining an inter-function calling relationship in the target source code set, and automatically cutting the target source code set through the inter-function calling relationship. According to the method and the device, the native module-level clipping is reproduced logically, so that functions which are not in the kernel execution path are removed from the Linux kernel source code obtained after clipping, the size of the Linux kernel is reduced, the compiling speed is increased, and the safety of the Linux kernel is improved.

The invention discloses a file compiling method and device, electronic equipment and a storage medium, and relates to the technical field of data processing. According to the specific implementation scheme, compiling control parameters of a to-be-compiled file are obtained; creating a compiling thread according to the compiling control parameter, and adding the compiling thread to a preset thread pool; and compiling based on the unique identification information of the to-be-compiled file in each compiling thread. According to the embodiment of the invention, the file compiling time is shortened, the file compiling process is accelerated, repeated file compiling is avoided, and the file compiling efficiency is improved.

The present application belongs to the technical field of knowledge compilation and network reliability analysis, and particularly relates to a network reliability intelligent computing method and system for a logical decision graph, comprising: modeling a network system as a triple data structure composed of a network topology graph, a terminal node set and an edge availability probability set; determining a topology order of network nodes and network edges based on the triple data structure; constructing a full binary tree vtree with leaf nodes corresponding to network edges one by one according to the topology order; and compiling the network topology graph into a zero-suppression statement logical decision graph using the vtree, wherein the zero-suppression statement logical decision graph is used to represent a set of valid subgraphs that satisfy terminal node connectivity; and recursively calculating a reliability value of the network system based on the zero-suppression statement logical decision graph.

The application provides a RT-THREAD resident system based on D1-H, which comprises a user module and a BIOS module, wherein the BIOS module comprises a hardware abstraction layer, an RTOS layer, and an API layer; the RTOS layer comprises an RT-Thread kernel, a thread management unit, a synchronization and communication unit, a clock management unit, and a memory management unit; the hardware abstraction layer comprises a driver construction, a software component, and a BootLoader; and the API layer comprises a driver component interface, a software component interface, and an RTOS service calling interface.The application has the advantages of reducing the programming threshold, improving the portability of application programs, and improving the compiling speed; the starting process after the RT-Thread is resident is analyzed, a resident test experiment is designed taking the synchronization and communication as an example, and the test result proves the feasibility of the RT-Thread resident.

A loop vectorization method and apparatus are disclosed. The loop vectorization method includes: in response to determining that the current loop can be rolled back, creating a first data structure corresponding to the current loop after the loop rollback; for the current loop and the first data structure, determining the maximum vectorization factor and candidate vectorization factors of the current loop that will not cause register overflow, respectively; determining the optimal vectorization factor from the candidate vectorization factors; in response that the optimal vectorization factor is a candidate vectorization factor determined for the first data structure, performing a loop rollback on the current loop to reduce the number of registers used in each iteration of the current loop after the loop rollback; selectively performing loop unrolling on the current loop after the loop rollback to obtain a first target loop; and performing a vectorization transformation on the first target loop based on the optimal vectorization factor.

The invention relates to a state-keeping front-end code hot updating method and device. Comprising the steps of monitoring an updating condition of a code file in a target application, and determining a function module corresponding to an updated part in the code file in the target application as a to-be-updated function module; according to the language and the framework of the code file, calling a corresponding compiling tool to compile the updated first code of the to-be-updated function module to obtain a compiled second code; the second code is sent to the client side, the client side determines a to-be-updated function module corresponding to the second code, the current state of the to-be-updated function module is stored, the second code is injected into the to-be-updated function module of the target application, and the stored current state is applied to the second code of the to-be-updated function module. Therefore, a user can automatically load the updated code into the running application without manually refreshing the page, and the current running state of the application can be kept, so that the use experience of the user is improved.