74 results about "Thread management" patented technology

The invention discloses a thread management optimization method and device based on GPU sharing, and the method comprises the steps: inputting the attribute information of a target task and a current GPU state into a target prediction model when the target task is obtained, so as to obtain a prediction result outputted by the target prediction model; under the condition that the performance parameters reach the standard, calling thread block configuration and a shared memory to execute the target task so as to improve the data processing efficiency of each thread in the execution process of the target task; when it is monitored that the load of any thread is abnormal, the load of any thread is distributed to other threads with the fragment rate meeting the requirement, so that the execution efficiency of the target task is guaranteed. According to the method, the target prediction model is utilized, the thread block configuration of the target task is determined, the thread block configuration is called and the shared memory is shared, the data processing efficiency of the target task is improved, the abnormal load is distributed to other threads for execution, and the execution efficiency of the target task in the GPU shared environment is effectively guaranteed.

The present invention belongs to the field of data processing, and specifically relates to a method and system for dynamically switching data sources of soft and hard panels of a flight simulator based on shared memory. The method aims to solve the problems of high latency, waste of resources, risk of data loss, and high maintenance costs in the prior art. The present invention comprises the following steps: constructing a database relationship binding table; establishing a corresponding data structure; initializing shared memory and updating variable addresses; associating data structures and defining data source switch parameters; activating a source switching judgment thread and a working thread; running a module to cause the soft and hard panels to write data according to the switch state; and releasing resources upon exit. The present invention achieves variable-level precise switching, avoids redundant switching through database binding tables and state variables; uses shared memory technology to improve data synchronization efficiency and system stability; uses dynamic thread management to reduce switching delays and improve response performance; and simultaneously improves simulator fault diagnosis and maintenance efficiency, reducing debugging time and costs.

In a thread management method, an application submits first information to an operating system through an API. The first information is used to indicate at least one first task to be executed by the application. The operating system allocates, by using the first information, the at least one first task to be executed by the application to a corresponding first task queue, and allocates a thread to the first task queue based on a current load level of the operating system and a type of the first task queue.

The invention belongs to the field of data processing, and particularly relates to a flight simulator soft and hard panel data source dynamic switching method and system based on a shared memory. The invention aims to solve the problems of high delay, resource waste, data loss risk and high maintenance cost in the prior art. The method comprises the following steps: constructing a database relationship binding table; establishing a corresponding data structure; initializing a shared memory and updating a variable address; associating the data structure and defining a data source switch parameter; activating a source switching judgment thread and a working thread; the operation module enables the soft and hard panels to write data according to the on-off state; the resources are released during quit. According to the method, variable-level accurate switching is realized, and redundant switching is avoided through a database binding table and a state variable; the shared memory technology is adopted to improve data synchronization efficiency and system stability; dynamic thread management reduces switching delay and improves response performance; meanwhile, the fault diagnosis and maintenance efficiency of the simulator is improved, and the debugging time and cost are reduced.

The invention discloses a system and a method for performing flash disk redundant array computing management based on a GPU (Graphics Processing Unit). The system comprises an application layer, a host control layer, a GPU computing layer, a storage layer and a monitoring and optimizing layer. An application layer receives an external request through an API, and a task manager decomposes a file into an executable task corresponding to RAID fragmentation data; a host control layer coordinates task distribution of a GPU cluster and an NVMe solid state disk array through a task scheduler, an NVMe driver manages storage equipment, and a GPU direct connection port supports direct data transmission of a calculation layer and a storage layer; a GPU cluster of the GPU calculation layer comprises a hierarchical thread pool, a self-adaptive fragmentation module, a parallel verification assembly line and a video memory management module which are used for respectively realizing thread management, dynamic fragmentation adjustment, RAID verification calculation and video memory distribution; the storage layer stores fragments and redundant data by using an NVMe array; and the monitoring and optimization layer realizes system state monitoring and scheduling optimization through performance monitoring and AI prediction. According to the invention, the data fragmentation, verification and storage efficiency can be improved.

The invention discloses a multi-modal visual analysis system for teaching, which belongs to the technical field of computer vision and artificial intelligence, and comprises a video acquisition and processing module for acquiring video frames in real time and judging whether dynamic change exists in a scene; the multi-thread parallel analysis module is used for realizing parallel processing of video acquisition and analysis; the user interface module is used for displaying the captured real-time video frames by designing interface layout; the analysis result output and display module is used for pushing and displaying the intermediate result in real time and sending a final analysis conclusion after analysis is completed to the user interface module; the system stability and resource management module comprises multi-thread management and synchronization and resource overhead monitoring and optimization; the log and error processing module is used for recording the running information of the program, recording the captured exception into a log and taking corresponding measures; according to the multi-mode visual analysis system for teaching, the real-time video frame is analyzed, so that the practical operation efficiency and quality are improved.

Apparatus and method for throttling ray tracing operations based on a cache hit rate. For example, one embodiment of a processor comprises: a cache subsystem comprising one or more caches; circuitry to track a plurality of hits and misses in the cache subsystem for data accesses associated with ray tracing operations; and thread management logic to dynamically control a working set size for the ray tracing operations based on the plurality of hits and misses.

The invention relates to a multi-thread dynamic task scheduling circuit, a computing chip and a computing system, which are integrated in a parallel computing chip, and comprise a plurality of thread management units which are respectively used for storing context information of each task thread, reading an instruction stream from a memory through an internal instruction reading and transmitting unit, and decoding and transmitting the instruction stream; the arithmetic logic unit is used for executing arithmetic and logic operation instructions of the thread management unit so as to realize dynamic parameter derivation during operation; the task distribution unit is used for arbitrating the task configuration information transmitted by the plurality of thread management units and distributing the task configuration information to each processing unit in the chip; and the synchronization unit is used for synchronizing primitives through hardware so as to realize synchronization among the plurality of thread management units and synchronization between the thread management units and the processing unit. Each thread is programmable and adapts to complex scenes such as dynamic image sizes and dynamic calculation processes.

The invention discloses a visual API gateway arrangement aggregation control method and device and a storage medium, and relates to the technical field of micro-services, and the method comprises the steps: responding to an updating instruction, and obtaining at least one API arrangement configuration corresponding to the updating instruction; according to an analysis result of the API arrangement configuration, executing a thread management process, and generating / calling at least one target thread; and generating a gateway node component meeting a task scheduling normal form based on the target thread through topology packaging processing. According to the application, the processes of various service components are arranged through the visual dragging operation, and a self-defined asynchronous arrangement scheme is adopted, so that the technical problem that the service response speed of an API gateway is insufficient due to the fact that only simple forwarding can be carried out and the processing of a complex service process cannot be effectively supported in the prior art is solved; and the response efficiency of the API gateway interface and the service implementation efficiency are improved.

The invention discloses an automatic simulation test system and method for a multi-model and multi-configuration robot, and the system comprises a server and a plurality of test industrial personal computers, and the server is in data connection with the plurality of test industrial personal computers. Parameters are stored through the model configuration file unit, automatic scheduling is conducted through the task scheduling unit, the synchronous tool unit and the operation and maintenance tool unit are combined, full-process automatic switching of test models, configurations and test cases is achieved, manual intervention is not needed, and the problems that in the prior art, due to dependence on manual operation, efficiency is low, and errors are prone to occurring are thoroughly solved; a test is deployed on an actual industrial personal computer, hardware data are collected in real time by means of a hardware monitoring module, and hardware performance verification of the industrial personal computer is completed while functions of robot control software are verified; an independent thread is distributed for each industrial personal computer through the thread management unit, parallel testing of multiple industrial personal computers is supported, the testing throughput is greatly improved, and the overall testing period of multi-model and multi-configuration robots is shortened.

The invention discloses a Java-based micro-thread management system and method, the system comprises a micro-thread class, a queue, an actuator, a scheduler and the like, the micro-thread class defines a related interface and a queue storage instance, the running state of the micro-thread class is marked by an atomic variable and has multiple states, and the micro-thread class further comprises a life cycle control module. The management method comprises the steps of micro-thread instance creation and initialization, queue insertion and thread awakening, execution state switching and task execution, dynamic state management and control, priority scheduling strategy execution and the like. Wherein the actuator comprises a thread circulation and exception handling module, the scheduler comprises a dynamic priority chaotic mapping module, and the exception handling module has a classification processing and shadow thread mechanism and the like. According to the method, resource occupation of a single microthread is reduced through cooperation of all the components, the memory utilization rate is improved through the queue structure, and then the priority and the execution strategy can be flexibly set through the scheduler and the executor.

The invention discloses a liquid cooling plate processing full-flow management and control method and system and a medium, and relates to the technical field of liquid cooling plate processing, and the method comprises the steps: positioning management and control elements of a key stage of a liquid cooling plate processing production line; taking a mechanical tail end and a liquid cooling plate action area as a tracking target, constructing a dual-thread management and control model, deploying a microcontroller cluster to an edge side, and establishing communication interaction; the cluster is directionally triggered along with flow of a production line, full-process closed-loop control is realized through polling processing of directional tracking, error verification and lower decision, and a processing data chain generated by the cluster is used as a quality inspection traceability basis to solve the problem that the quality inspection accuracy is high due to interaction between complex process parameters and processing equipment. According to the technical scheme, the technical problems that the machining precision is unstable and errors in the machining process are difficult to effectively correct in the prior art are solved, and the technical effects that resonance and errors in the machining process are effectively eliminated through directional triggering and stage polling processing of the microcontroller cluster, and the machining quality and stability of the liquid cooling plate are ensured are achieved.

Systems and methods for a scalable hardware cache with configurable logical ports and related thread management are described. A scalable hardware cache includes a request interface having a first logical port and a second logical port associated with a fully-associative cache memory. The first logical port is configured to receive a first set of read requests with an expected cache hit and the second logical port is configured to receive a second set of read requests with an expected cache miss. The scalable hardware cache further includes thread processing circuitry to manage a first maximum number of a first set of threads for processing the first set of read requests and a second maximum number of a second set of threads for processing the second set of read requests that can be active at a given time based on a performance metric associated with the scalable hardware cache.

Aspects of the disclosure relate to batch processing at distributed servers. A computing platform may receive a first web service request, which may be a request for batch servicing. The computing platform may initiate a batch queue thread manager to process the first web service request, which may initiate a plurality of process threads, each configured to process, at any one time, a single job of the batch servicing. The computing platform may process, using the batch queue thread manager, the first web service request, which may include, by each of the plurality of process threads: 1) processing a first job of the batch servicing, and 2) processing, after completion of the first job, at least a second job of the batch servicing. After completion of the processing of the first web service request, the computing platform may output a response to the first web service request.

The embodiment of the invention discloses a thread management method and device, equipment and a readable medium. The method comprises the steps that multiple service threads needing to be scheduled for loading a scene view are obtained; obtaining a first parameter value of a display quality parameter of the scene view when each service thread is in a calculation resource quantity saturation state, and obtaining a second parameter value of the display quality parameter of the scene view when each service thread is in a calculation resource quantity non-saturation state; based on the first parameter value and the second parameter value corresponding to each service thread, calculating the quality influence degree of each service thread on the display quality of the scene view; and scheduling the processor cores for the plurality of service threads based on the quality influence degrees corresponding to the plurality of service threads respectively. According to the technical scheme, the scheduling reasonability of the service threads can be improved.

The present invention relates to the technical field of operating systems, and discloses a microkernel optimization method for an Internet of Things operating system. A plurality of Internet of Things devices and server devices are provided in the Internet of Things, and the Internet of Things operating system is applied to each of the Internet of Things devices and the server devices; the microkernel optimization method includes a system interface merging method, a thread ready queue delay update process, a specified thread call process, a thread lock release process, a capability word delegation process, and a capability word delegation revocation process. The technical solution of the present invention has the beneficial effect of providing a microkernel optimization method for an Internet of Things operating system, which can realize functions such as thread management, address space management, inter-thread communication, interrupt processing, etc., while taking into account all underlying functions and flexible microkernel architecture design, and avoiding circular dependencies between different modules.

Apparatus and methods for throttling ray tracing operations based on cache hit rates are disclosed. For example, one embodiment of a processor comprises: a cache subsystem, the cache subsystem comprising one or more caches; circuitry for tracking a plurality of hit and miss in the cache subsystem for data access associated with a ray tracing operation; and thread management logic to dynamically control a work set size for ray tracing operations based on the plurality of hits and misses.

The embodiment of the present application discloses a method for reading and writing a solid-state hard disk and a computer-readable storage medium. The method is applied to a read-write module in a kernel module of an operating system; the read-write module is used to maintain a continuous virtual memory page space and a distributed memory page allocator, the virtual memory page space is composed of multiple virtual memory pages, and each virtual memory page corresponds to a solid-state hard disk page one by one; the distributed memory page allocator is composed of several working threads, and each working thread manages a local memory pool composed of physical memory pages; the method includes the following steps: parsing the obtained read-write instructions to determine the target data to be processed and the read-write requirements; locating the corresponding virtual memory page and physical memory page according to the target data address; processing the target data in the solid-state hard disk page and / or physical memory page according to the read-write requirements to complete the read-write operation of the target data. The present application can improve the read-write efficiency of solid-state hard disk files.

A data transmission method is provided, where the method includes: receiving a user datagram protocol (UDP) data packet transmitted by a client; determining a target second thread from n second threads through a first thread, where the n second threads are configured for processing the UDP data packet, and the target second thread is configured for managing a QUIC connection corresponding to the UDP data packet; and transferring the UDP data packet to the target second thread through the first thread. The second threads are scheduled by the first thread, and different second threads may manage different QUIC connections, so that QUIC connections are managed through different threads. Therefore, a server can fully utilize a concurrent processing capability of a plurality of cores, which improves the efficiency of managing QUIC connections and the data transmission performance.

The invention relates to the technical field of computer application, and discloses a thread management method, a readable medium, electronic equipment and a program product. In the method, the electronic equipment can determine a target thread meeting a priority control condition according to the running time of a thread of which the priority type is a real-time priority, and the priority type of the target thread is reduced from the real-time priority to a non-real-time priority. And when it is detected that the target thread meets the operation management and control condition, suspending the target thread. By means of the thread management and control method, the problem that part of the threads with the priority types being real-time priorities run continuously for a long time or occupy hardware resources of a processor for a long time, and consequently other threads cannot run can be solved, and thread blocking is avoided.

A large-scale network node simulation method based on Linux container is provided, which solves problems of low packet transmission efficiency and multi-thread creation in real-time simulation in a large-scale network scenario. The method includes: scheduling all container nodes in a scenario; managing, by a container node, a dynamic thread through an idle thread management queue, and setting a finite state machine and a function pointer for the dynamic thread; registering, by a source container node, an output queue with a next-hop container node, and informing the next-hop container node to allocate a dynamic thread for receiving and processing the output queue. Packet transmission is realized between the container nodes through data units created in a shared memory. The sending thread and the receiving thread dynamically adjust the number of dynamic threads by checking the state of the output queue.

Systems and methods for a scalable hardware cache with configurable logical ports and related thread management are described. A scalable hardware cache includes a request interface having a first logical port and a second logical port associated with a fully-associative cache memory. The first logical port is configured to receive a first set of read requests with an expected cache hit and the second logical port is configured to receive a second set of read requests with an expected cache miss. The scalable hardware cache further includes thread processing circuitry to manage a first maximum number of a first set of threads for processing the first set of read requests and a second maximum number of a second set of threads for processing the second set of read requests that can be active at a given time based on a performance metric associated with the scalable hardware cache.

The present invention discloses an RT-Thread security protection method based on PMP. First, the RT-Thread reconstructs the thread management and context switching modules to achieve hierarchical isolation between the machine mode and the user mode and adapt to the security architecture of RISC-V. Secondly, the adapted RT-Thread system divides the memory hierarchy and sets permissions, and based on the divided memory hierarchy, creates a data structure to manage the memory area. Then, based on the divided memory hierarchy and data structure, security memory application, access, and authentication policies are designed. Finally, based on the security memory application, access, and authentication policies, a thread dynamic permission configuration and nested isolation policy are designed to complete the security protection of RT-Thread. The present invention realizes multi-level security protection for the memory area, lightweight realizes the security policy, can achieve finer-grained security protection, and enhances the system security.

The invention discloses a multi-thread testing scheme oriented to the automatic testing industry, and the scheme realizes efficient and reliable parallel testing and data management through a multi-thread architecture design. The scheme comprises the following steps: (1) dividing a software thread into a Winform main thread, a test execution thread, a result uploading thread and a state monitoring thread; (2) the Winform main thread is responsible for user interaction and function module switching; (3) supporting a multi-station parallel test by a test execution thread, and realizing a serial-parallel combined test logic through the design of'stations' and'test bits'; (4) a result uploading thread uploads test results and logs in a unified mode, and the number of database connection times is reduced; (5) a state monitoring thread monitors the software state in real time and uploads error information; and (6) a lock mechanism is adopted to protect shared resources, and data competition and deadlock are avoided. The invention has the following beneficial effects: (1) the test efficiency is improved, and flexible multi-station parallel test is supported; (2) the reliability of the system is enhanced, and stable data transmission and state monitoring are realized through an independent thread; and (3) optimizing thread management, and ensuring resource security and smooth program operation through a lock mechanism.

The invention discloses a CXL memory allocation scheduling method in a Linux environment, the method is executed by a CXL memory allocation scheduler, the CXL memory allocation scheduler comprises a wrapper, a thread management module and a memory management module, the wrapper obtains a memory allocation request of at least one application program, the memory allocation request is generated through a pre-created thread, and the thread management module is used for managing the thread. The thread is created by the thread management module and initialized by the memory management module to generate corresponding initialized memory information; the encapsulator calls a memory management module, the memory management module allocates an idle memory to be stored for each application program according to the memory allocation request in combination with the corresponding initialized memory information, and the memory to be stored is a large object memory or a small object memory obtained by allocating a CXL memory in advance; the problem of low CXL memory allocation scheduling efficiency of the application program is solved; the large-object memory or the small-object memory can be allocated according to requirements, memory waste is avoided, efficient allocation and scheduling of the CXL memory are achieved, and memory access performance is improved.

The invention relates to the technical field of log recording, and particularly discloses a chain type recording method and device based on thread management and a storage medium, and the method comprises the following steps: entering a business process, and setting a business unique code for the name of a current thread; the current thread is a sub-thread, and the thread name of the current thread is empty; if yes, obtaining the unique service code from the father thread name, combining the unique service code with the current thread ID, and generating and setting the thread name of the current thread; when the log record is executed, obtaining the unique service code from the current thread name, and injecting the unique service code into the log data; automatically storing the log data containing the service unique code, automatically generating record data associated with the service calling link based on the stored log data, and ending log recording; according to the method, the unique service code is set at the service entrance, and the code is automatically transmitted in the calling link and the sub-thread, so that automatic association between the chained record of the log data and the service calling link is realized.

The invention discloses a system and a method for accelerating a gene alignment execution process. The system comprises a processing thread management module, one or more dynamic caches and a dynamic cache management module. Wherein the processing thread management module is configured to set a gene comparison process as a multi-stage assembly line, each execution step of the gene comparison process corresponds to one assembly line stage on the multi-stage assembly line, and a plurality of processing threads are distributed for each assembly line stage; and dividing gene sequence data to be compared into a plurality of data blocks and providing the data blocks to the multi-stage assembly line for processing. The dynamic caches are used for data transmission between two pipeline stages, and each dynamic cache comprises at least two cache blocks. And the dynamic cache management module is configured to manage distribution and recovery of the dynamic caches between the two pipeline stages and control switching of working states between different cache blocks in each dynamic cache. According to the method, the overlapping degree of process calculation and input and output is higher, the memory efficiency is higher, and the performance of overall execution is improved.

The invention relates to a simulator thread management method and device, computer equipment, a computer readable storage medium and a computer program product. The method is applied to a host server, and comprises the following steps: under the condition that a simulator thread and a virtual central processing unit thread of a first target virtual machine preempt a first physical central processing unit core on the host server, acquiring abnormal preemption time of the first target virtual machine, and sending the abnormal preemption time to a scheduling platform; receiving a creation instruction sent by the scheduling platform; in response to the creation instruction, creating a first simulator thread pool bound with a second physical central processing unit core in the host server; and unbinding a simulator thread of a first target virtual machine in the host server from the first physical central processing unit core, and binding the simulator thread to a second physical central processing unit core bound to the first simulator thread pool. By means of the method, the threads can run in an isolated mode, preemption time is shortened, and therefore the performance of the cloud host is improved.

The invention discloses a process execution platform, a process execution method, equipment and a storage medium, and relates to the technical field of process execution, and the platform comprises a process configuration module which is used for obtaining a process configuration record table and a step configuration record table provided by a business system; the process monitoring and triggering module is used for monitoring a starting condition of the process configuration record table and generating a to-be-executed process after the process starting condition is met; the step scheduling and thread management module is used for determining a plurality of to-be-executed steps corresponding to the to-be-executed process based on the step configuration record table, monitoring step starting conditions of the to-be-executed steps and executing the to-be-executed steps after the step starting conditions are met; and the step execution and aspect control module is used for determining the execution condition of each to-be-executed step and generating a process execution result of the to-be-executed process. According to the application, automatic control can be independent of a service function, a service system does not need to be transformed when a process is newly added or adjusted, and development and maintenance cost is reduced.

The application discloses a file migration system, method, device and storage medium. The application relates to the field of file management. The system comprises a query thread management module, a download thread management module, an upload thread management module and an update thread management module. The query thread management module is used for assigning attribute information of a file to be migrated to a text object and transmitting the file to a waiting download queue; the download thread management module is used for assigning a file stream to the current text object and transmitting the file to a waiting upload queue; the upload thread management module is used for uploading the file stream to a migration database and transmitting the text object after the migration text identification is assigned to a waiting update queue; and the update thread management module is used for updating a migration file index table in the migration database. The technical scheme of the embodiment of the application splits the migration process of the file to be migrated into multiple stages such as query, download, upload and data table update, and different function threads are concurrently executed, so that the concurrent mechanism of the multithreading is fully utilized, and the file migration efficiency between databases is improved as a whole.