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Thin film transistor substrate and manufacturing method

A technology for substrates and conductive bumps, applied in semiconductor/solid-state device manufacturing, electric solid-state devices, semiconductor devices, etc., can solve the problem of unequal heights of composite bumps 31, the height of composite bumps 31 cannot be controlled well, and cannot Solve problems such as electrical short circuits

Active Publication Date: 2008-01-09
AU OPTRONICS CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] When a chip 30 with several composite bumps 31 is electrically connected to several electrode pads of a glass substrate through the anisotropic conductive film, the conductive particles of the anisotropic conductive film are easily gathered in the adjacent two composite bumps. Between the bumps 31, the phenomenon that the adjacent two composite bumps 31 are electrically connected, still cannot solve the problem of electrical short circuit
In addition, the height of the composite bump 31 formed on the chip 30 through the traditional bump process cannot be well controlled, and it is easy to produce the phenomenon of unequal height of the composite bump 31, which causes electrical problems when the chip 30 is combined with the substrate. Contacting Non-Coplanar Defects

Method used

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  • Thin film transistor substrate and manufacturing method
  • Thin film transistor substrate and manufacturing method
  • Thin film transistor substrate and manufacturing method

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Embodiment 1

[0023]Please refer to FIGS. 4A-4F , which illustrate a flow cross-sectional view of a manufacturing method of a thin film transistor substrate according to Embodiment 1 of the present invention. Please refer to FIG. 2 at the same time. First, as shown in FIG. 4A , a glass substrate 101 is provided, and a first metal layer is formed on the glass substrate 101 . Part of the first metal layer is removed to form the gates 103 a - 103 c and the electrode pads 109 . Next, as shown in FIG. 4B , the source 104a and the drain 105a, the source 104b and the drain 105b, and the source 104c and the drain 105c are respectively formed on the gates 103a-103c, so that the gates 103a-103c, the source The electrodes 104a to 104c and the drains 105a to 105c cooperate to form the thin film transistors 101a to 101c. Wherein, the electrode pad 109 is electrically connected to the thin film transistors 101 a - 101 c. Then, as shown in FIG. 4C , color filters 106 a - 106 c are respectively formed on...

Embodiment 2

[0026] Please refer to FIGS. 5A-5F , which illustrate a flow cross-sectional view of a manufacturing method of a thin film transistor substrate according to Embodiment 2 of the present invention. Please refer to FIG. 2 at the same time. First, as shown in FIG. 5A , a glass substrate 101 is provided, and a first metal layer is formed on the glass substrate 101 . A portion of the first metal layer is removed to form the gates 103a-103c. Next, as shown in FIG. 5B , a second metal layer is formed on the glass substrate 101 and covers the gates 103 - 103c. Part of the second metal layer is removed to form the source electrodes 104 a - 104 c , the drain electrodes 105 a - 105 c and the electrode pad 109 . In addition, the source 104a and the drain 105a, the source 105a and the drain 105b, the source 104c and the drain 105c are above the gates 103a-103c, the gates 103a-103c, the sources 104a and 104c and the drains 105a-105a- 105c cooperates to form the thin film transistors 101a-1...

Embodiment 3

[0029] Please refer to FIGS. 6A-6F , which illustrate a cross-sectional view of the process of the manufacturing method of the thin film transistor substrate according to the third embodiment of the present invention. Please refer to FIG. 2 at the same time. First, as shown in FIG. 6A , a glass substrate 101 is provided, and a first metal layer is formed on the glass substrate 101 . , removing part of the first metal layer to form the gates 103a-103c and the electrode pad layer 109a. Next, as shown in FIG. 6B , a second metal layer is formed on the glass substrate 101 to cover the gate electrodes 103 - 103 c and the electrode pad layer 109 a. A part of the second metal layer is removed to form the source electrodes 104a-104c, the drain electrodes 105a-105c and the electrode pad top layer 109b. In addition, the source 104a and the drain 105a, the source 105a and the drain 105b, the source 104c and the drain 105c are above the gates 103a-103c, the gates 103a-103c, the sources 1...

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Abstract

This invention relates to a baseboard of a film transistor including a glass baseboard, a film transistor, an electrode pad and a conduction convex block, among which, the transistor is connected with the pad formed on the baseboard. The convex block includes several insulation blocks divided on the pad and a conducting layer covering the top surfaces of the blocks, the inside surfaces of which are connected with part of the pad and outer surfaces of which are exposed out of the conducting layer.

Description

technical field [0001] The present invention relates to a thin film transistor substrate and a manufacturing method, in particular to a thin film transistor substrate with conductive bumps and a manufacturing method. Background technique [0002] In some existing electronic devices, components and main circuits are connected through an anisotropic conductive film (ACF). For example, a driver chip is electrically connected to a display panel through an anisotropic conductive film. Among them, the anisotropic conductive film is made of a mixture of non-conductive synthetic resin and conductive particles, and the central part of the conductive particles is a polymer, and the outer surface of the polymer is coated with a metal conductor, such as gold, Nickel, tin, etc. The anisotropic conductive film is often used in the manufacturing process of the flat panel display, and the bonding technology of the driver chip and the liquid crystal display panel includes at least a chip on...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L23/48H01L23/12H01L21/60H01L21/28
CPCH01L2224/73204
Inventor 陈慧昌李俊右周诗频
Owner AU OPTRONICS CORP