'Soft error suppress circuit based on isolate method

Abstract

The "soft error" suppression circuit based on the isolation method belongs to the field of high reliability integrated circuit design. It is characterized in that the sensitive nodes in the circuit are isolated with controllable transmission gates, thereby isolating the "soft error" transmission path, effectively The occurrence of "soft errors" is suppressed. Thus reducing the likelihood of "soft errors" occurring.

Description

technical field [0001] The application field of "'Soft Error' Suppression Circuit Structure Based on Isolation Method" is the design of high-reliability large-scale integrated circuits. The proposed circuit is suitable for integrated circuits that need to work in strong radiation areas. It can greatly suppress the instantaneous current generated when neutrons, alpha particles, cosmic rays and other radiation sources irradiate the CMOS transistor channel at the cost of relatively small power consumption and area. So as to achieve the purpose of suppressing "soft errors". Background technique [0002] As the feature size of the CMOS process has entered 100 nanometers, the number of transistors integrated on a chip is increasing, and at the same time, more and more storage resources such as SRAM and cache memory are integrated on the chip. At this time, the probability of "soft errors" in the circuit is also increasing. [0003] "Soft Errors" (Soft Errors) is a temporary abn...

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Problems solved by technology

In this approach, the transmission gate is always on, and the suppression effect on "soft errors" is relatively small

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