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Semiconductor device and its manufacturing method

A technology for semiconductors and devices, applied in the field of miniaturized semiconductor devices, can solve the problems of poor connectivity, difficult semiconductor devices, poor connectivity (poor solder wettability, etc.), and achieve the effect of high reliability

Active Publication Date: 2010-07-21
SANKEN ELECTRIC CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Electrodes made of metals such as nickel or copper that are easy to solder and connect to, have poor connectivity with leads made of metals such as aluminum or gold
In addition, electrodes made of metals such as aluminum that have high connection strength to lead wires have poor connectivity (solder wettability) with solders made of metals such as lead and tin.
Therefore, in the semiconductor device of the above-mentioned Patent Document 1, it is difficult to realize a semiconductor device capable of obtaining high solder strength and lead connection strength.

Method used

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  • Semiconductor device and its manufacturing method
  • Semiconductor device and its manufacturing method
  • Semiconductor device and its manufacturing method

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Embodiment Construction

[0034] Below, refer to Figure 1- Figure 12 , the semiconductor device and its manufacturing method according to the present invention will be described.

[0035] As shown in FIG. 1, the semiconductor device of the present embodiment has a lower IGBT (insulated gate bipolar transistor) (1) as a lower semiconductor element, and a lower portion formed on the upper surface (1a) of the lower IGBT (1). The electrode layer (5), the spacer electrode layer (gate pad) (18) which is separated from the lower electrode layer (5) and formed on the upper surface (1a) of the lower IGBT (1), and the electrode layer (gate pad) (18) formed on the lower electrode layer (5) ), the upper electrode layer (6) on the upper surface (5a) of the upper electrode layer (6), the upper IGBT (2 ), the uppermost electrode layer (27) formed on the upper surface (2a) of the upper IGBT (2), the non- A conductive protective film (9), and a non-conductive protective film (29) covering part of the uppermost elect...

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Abstract

A lower IGBT and an upper IGBT are excellently and firmly bonded by solder, the lower IGBT and a wire are firmly connected, and a highly reliable semiconductor device is formed. The semiconductor device is provided with a lower electrode layer (5) firmly bonded to the lower IGBT (1); an upper electrode layer (6) firmly bonded to the lower electrode layer (5); the upper IGBT (2) firmly bonded to the upper electrode layer (6); and the solder (7) for connecting the upper electrode layer (6) and the upper IGBT (2). The lower electrode layer (5) and the upper electrode layer (6) are formed of different materials, a wire connecting region (15) partially exposed to the external from a notched section (36) provided on the upper electrode layer (6) is arranged on an upper plane (5a) of the lower electrode layer (5), and a wire (8) is connected to the wire connecting region (15). The upper electrode layer (6) is formed of a material having excellent solderability, and the lower electrode layer (5) is formed of a material having high connecting strength with the wire (8).

Description

technical field [0001] The present invention relates to a semiconductor device, particularly a semiconductor device capable of stacking a plurality of semiconductor elements and achieving miniaturization. Background technique [0002] A semiconductor device known from the following Patent Document 1 includes: a metal support plate, a first transistor and a second transistor sequentially stacked on the support plate, a third transistor and a fourth transistor sequentially stacked on the support plate, and a control circuit (control IC) fixed on the support board between the first transistor, the second transistor, the third transistor, and the fourth transistor, consisting of the first transistor, the second transistor, the third transistor, and the fourth transistor H-type bridge circuit. According to Patent Document 1, by stacking the first transistor and the second transistor and simultaneously stacking the third transistor and the fourth transistor, it is possible to red...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/78H01L21/3205H01L27/04H01L23/52H01L29/739H01L27/088H01L27/00H01L25/04
CPCH01L2224/48599H01L25/18H01L2924/01047H01L2924/13055H01L2924/014H01L2924/01029H01L2224/49113H01L2224/0603H01L29/7395H01L24/06H01L2224/05647H01L2924/01079H01L2224/48747H01L2924/01004H01L2224/48091H01L25/071H01L2224/73265H01L2224/48647H01L2224/48699H01L2924/01006H01L2924/01022H01L2224/32145H01L2224/45124H01L2224/05556H01L2224/48724H01L2924/01014H01L25/50H01L24/05H01L2224/48624H01L2924/0105H01L2224/49111H01L2224/05624H01L24/32H01L2224/45144H01L2924/01013H01L2224/48137H01L2924/01028H01L2924/01033H01L2924/01082H01L2924/01015H01L24/49H01L2224/05644H01L2224/92247H01L2924/01078H01L2224/49171H01L2224/48463H01L2224/48644H01L2224/04042H01L2224/48247H01L2924/1306H01L2924/1301H01L2924/13033H01L2924/1305H01L2224/02166H01L2924/181H01L2224/45155H01L2224/48824H01L2224/48844H01L2224/48847H01L2224/05599H01L2224/85399H01L2924/00014H01L2224/05554H01L24/45H01L2924/10253H01L2924/00011H01L24/48H01L2924/00H01L2224/48744H01L2924/013H01L2924/00013H01L2224/45015H01L2924/207H01L2924/00012
Inventor 鸟居克行
Owner SANKEN ELECTRIC CO LTD